TPU v4 TC 指令索引

当前登记 573 个非 Noop descriptor 形式、798 条展开签名、598 个槽与助记符组合。这些数字含不同槽、编码变体与别名，不等于独立助记符数量，也不是设备执行覆盖率。

如何阅读

表内操作数按源码顺序排列，用法为 { 槽: [@pN 或 @!pN] 助记符 操作数 }。s[0..31] 等表示可选寄存器编号，/ 表示类型或拼写的选择；这些记号是索引表示法，不是可直接粘贴的源码。多目的元组如 (gmr0, gsfn0, mrf0) 则是实际语法。

iN/uN 表示 N 位有符号/无符号数值类型，f32 表示 float32；非负十六进制数还可以表示该位宽的原始位型，f32bits(...) 直接给出 float32 位型。数值类型限定输入位宽，并不保证范围内每个值都满足某条指令的选择器、立即数拆分和整个指令包的资源条件。表中合并了同类型的编码候选，最终可编码性由汇编器检查。

label 表示源码标签；直接分支与 call 的 .rel 数值是相对当前指令包的位移，.abs 数值是 bundle PC。

地址的外层方括号、冒号和空间名是实际语法，内部圆括号用来分组类型，[+ …]、[, sm=…]、[, ss=…] 表示可选部分。允许零基址的向量存取可直接写数值偏移，如 [vmem:0x40]。操作数的数值单位沿用 ISA，不统一解释为字节。vmem 指 TC VMEM，cmem 指 Megacore Shared CMEM。

相同槽与助记符下不同签名分行显示；相同操作数类型的编码变体合并。所有具名参数都必须提供，允许换序。谓词前缀的范围为 p0..p14，不由表内其他谓词寄存器字段的位宽推导。vm[0..31] 只是 5-bit 目的字段的编码范围，真机只有 vm0..vm7；实际执行写入 vm8..vm31 的指令会使 TensorCore halt。共享通路、跨操作数字段相等关系以及 .encoding 约束仍按格式参考处理。

未登记的形式会被拒绝；尚不支持的 9 个形式见未登记的形式。

按槽查找

s0 · s1 · va0 · va1 · vst · vld · cld · vx0 · vx1 · vr0 · vr1 · misc

s0

助记符	按顺序排列的操作数类型
dma.general	[(vmem / smem / imem / hbm / cmem / oq[0..31]):s[0..31]], [(vmem / smem / imem / hbm / cmem / memseti / memsetd):s[0..31]], length=(s[0..31] / u32), stride_descriptor=([smem:(s[0..31] / u32)]), stride_count=(u2), src_flag=([sflag:(s[0..31])]), dst_flag=([sflag:(s[0..31])]), ici_dest=(s[0..31])
dma.general.trace	[(vmem / smem / imem / hbm / cmem / oq[0..31]):s[0..31]], [(vmem / smem / imem / hbm / cmem / memseti / memsetd):s[0..31]], length=(s[0..31] / u32), stride_descriptor=([smem:(s[0..31] / u32)]), stride_count=(u2), src_flag=([sflag:(s[0..31])]), dst_flag=([sflag:(s[0..31])]), ici_dest=(s[0..31])
dma.simple	[(vmem / smem / imem / hbm / cmem / oq[0..31]):s[0..31]], [(vmem / smem / imem / hbm / cmem / memseti / memsetd):s[0..31]], length=(s[0..31] / u32), dst_flag=([sflag:(s[0..31] / u32)])
dma.simple.trace	[(vmem / smem / imem / hbm / cmem / oq[0..31]):s[0..31]], [(vmem / smem / imem / hbm / cmem / memseti / memsetd):s[0..31]], length=(s[0..31] / u32), dst_flag=([sflag:(s[0..31] / u32)])
dma.strided	[(vmem / smem / imem / hbm / cmem / oq[0..31]):s[0..31]], [(vmem / smem / imem / hbm / cmem / memseti / memsetd):s[0..31]], length=(s[0..31] / u32), dst_stride=(s[0..31]), src_stride=(s[0..31]), elements_per_stride=(s[0..31]), dst_flag=([sflag:(s[0..31] / u32)])
dma.strided.trace	[(vmem / smem / imem / hbm / cmem / oq[0..31]):s[0..31]], [(vmem / smem / imem / hbm / cmem / memseti / memsetd):s[0..31]], length=(s[0..31] / u32), dst_stride=(s[0..31]), src_stride=(s[0..31]), elements_per_stride=(s[0..31]), dst_flag=([sflag:(s[0..31] / u32)])
por	p[0..31], p[0..14] / !p[0..14] / 1 / 0, p[0..14] / !p[0..14] / 1 / 0
sadd.s32	s[0..31], s[0..31] / i32, s[0..31]
sand.u32	s[0..31], s[0..31] / u32, s[0..31]
sbr.abs	label / u16
sbr.ind	s[0..31]
sbr.rel	label / i16
sc.u32	p[0..31], s[0..31], s[0..31] / u32
scall.abs	s[0..31], label / u16
scall.ind	s[0..31], s[0..31]
scall.rel	s[0..31], label / i16
sclz.u32	s[0..31], s[0..31] / u32
scvt.f32.s32	s[0..31], s[0..31], s[0..31] / u32
scvt.s32.f32	s[0..31], s[0..31] / i32
sdelay	u11
seq.f32	p[0..31], s[0..31], s[0..31] / f32
seq.s32	p[0..31], s[0..31], s[0..31] / i32
sfence	无操作数
sge.f32	p[0..31], s[0..31], s[0..31] / f32
sge.s32	p[0..31], s[0..31], s[0..31] / i32
sgt.f32	p[0..31], s[0..31], s[0..31] / f32
sgt.s32	p[0..31], s[0..31], s[0..31] / i32
shalt	无操作数
simm.s32	s[0..31], i32
sle.f32	p[0..31], s[0..31], s[0..31] / f32
sle.s32	p[0..31], s[0..31], s[0..31] / i32
slt.f32	p[0..31], s[0..31], s[0..31] / f32
slt.s32	p[0..31], s[0..31], s[0..31] / i32
smax.f32	s[0..31], s[0..31], s[0..31] / f32
smin.f32	s[0..31], s[0..31], s[0..31] / f32
smov	s[0..31], s[0..31]
smul.f32	s[0..31], s[0..31] / f32, s[0..31]
smul.u32	s[0..31], s[0..31] / i32, s[0..31]
sne.f32	p[0..31], s[0..31], s[0..31] / f32
sne.s32	p[0..31], s[0..31], s[0..31] / i32
sor.u32	s[0..31], s[0..31] / u32, s[0..31]
spop	s[0..31], v2sf
srdreg.gtchi	s[0..31]
srdreg.gtclo	s[0..31]
srdreg.lcchi	s[0..31]
srdreg.lcclo	s[0..31]
ssettag	s[0..31] / u32
sshll.u32	s[0..31], s[0..31], s[0..31] / u32
sshra.s32	s[0..31], s[0..31], s[0..31] / u32
sshrl.u32	s[0..31], s[0..31], s[0..31] / u32
ssub.s32	s[0..31], s[0..31] / i32, s[0..31]
sweird.f32	p[0..31], s[0..31]
sxor.u32	s[0..31], s[0..31] / u32, s[0..31]

s1

助记符	按顺序排列的操作数类型
dma.desc	[smem:(s[0..31] / u32)]
por	p[0..31], p[0..14] / !p[0..14] / 1 / 0, p[0..14] / !p[0..14] / 1 / 0
sadd.f32	s[0..31], s[0..31] / f32, s[0..31]
sadd.s32	s[0..31], s[0..31] / i32, s[0..31]
sand.u32	s[0..31], s[0..31] / u32, s[0..31]
sc.u32	p[0..31], s[0..31], s[0..31] / u32
sclz.u32	s[0..31], s[0..31] / u32
scvt.f32.s32	s[0..31], s[0..31], s[0..31] / u32
scvt.s32.f32	s[0..31], s[0..31] / i32
sdelay	u11
seq.f32	p[0..31], s[0..31], s[0..31] / f32
seq.s32	p[0..31], s[0..31], s[0..31] / i32
sfence	无操作数
sge.f32	p[0..31], s[0..31], s[0..31] / f32
sge.s32	p[0..31], s[0..31], s[0..31] / i32
sgt.f32	p[0..31], s[0..31], s[0..31] / f32
sgt.s32	p[0..31], s[0..31], s[0..31] / i32
shalt	无操作数
simm.s32	s[0..31], i32
sld	s[0..31], [smem:(s[0..31] / u32)] s[0..31], [smem:(s[0..31] + (s[0..31] / u32))]
sle.f32	p[0..31], s[0..31], s[0..31] / f32
sle.s32	p[0..31], s[0..31], s[0..31] / i32
slt.f32	p[0..31], s[0..31], s[0..31] / f32
slt.s32	p[0..31], s[0..31], s[0..31] / i32
smax.f32	s[0..31], s[0..31], s[0..31] / f32
smin.f32	s[0..31], s[0..31], s[0..31] / f32
smov	s[0..31], s[0..31]
sne.f32	p[0..31], s[0..31], s[0..31] / f32
sne.s32	p[0..31], s[0..31], s[0..31] / i32
sor.u32	s[0..31], s[0..31] / u32, s[0..31]
spop	s[0..31], v2sf
srdreg.gtchi	s[0..31]
srdreg.gtclo	s[0..31]
srdreg.lcchi	s[0..31]
srdreg.lcclo	s[0..31]
ssettag	s[0..31] / u32
sshll.u32	s[0..31], s[0..31], s[0..31] / u32
sshra.s32	s[0..31], s[0..31], s[0..31] / u32
sshrl.u32	s[0..31], s[0..31], s[0..31] / u32
sst	[smem:(s[0..31] / u32)], s[0..31]
ssub.f32	s[0..31], s[0..31] / f32, s[0..31]
ssub.s32	s[0..31], s[0..31] / i32, s[0..31]
sweird.f32	p[0..31], s[0..31]
sxor.u32	s[0..31], s[0..31] / u32, s[0..31]

va0

助记符	按顺序排列的操作数类型
getrngseed	v[0..31]
setrngseed	v[0..31]
vadd.8x128.s32	v[0..31], v[0..31] / s[0..31] / i32, v[0..31]
vand.8x128.u32	v[0..31], v[0..31] / s[0..31] / u32, v[0..31]
vc.8x128.u32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vclamp.gez.8x128.f32	v[0..31], v[0..31], v[0..31] / s[0..31] / f32
vclamps.8x128.f32	v[0..31], v[0..31], v[0..31] / s[0..31] / f32
vclz	v[0..31], v[0..31]
vcvt.8x128.f32.s32	v[0..31], v[0..31], v[0..31] / s[0..31] / u32
vcvt.8x128.s32.f32	v[0..31], v[0..31]
veq.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
veq.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vf32.e.s32	v[0..31], v[0..31]
vf32.f32	v[0..31], v[0..31] / s[0..31] / u32, v[0..31]
vf32.s.s32	v[0..31], v[0..31]
vge.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vge.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vgt.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vgt.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vimm.8x128.s32	v[0..31], i32
vlaneseq.8x128.u32	v[0..31]
vle.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vle.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vlmask	vm[0..31], v[0..31] / s[0..31] / u32
vlog2.8x128.f32	erf, v[0..31]
vlt.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vlt.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vmax.8x128.f32	v[0..31], v[0..31], v[0..31] / s[0..31] / f32
vmin.8x128.f32	v[0..31], v[0..31], v[0..31] / s[0..31] / f32
vmov.8x128	v[0..31], v[0..31] / s[0..31]
vmul.8x128.f32	v[0..31], v[0..31] / s[0..31] / f32, v[0..31]
vne.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vne.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vor.8x128.u32	v[0..31], v[0..31] / s[0..31] / u32, v[0..31]
vpack.8x128.f32.f16	v[0..31], v[0..31] / s[0..31] / f32, v[0..31]
vpackc.8x128.f32.f16	v[0..31], v[0..31] / s[0..31] / f32, v[0..31]
vpcnt	v[0..31], v[0..31]
vpow2.8x128.f32	erf, v[0..31]
vpush.8x128	erf, v[0..31]
vrcp.8x128.f32	erf, v[0..31]
vrng.8x128.u32	v[0..31]
vrot.slane.down.8x128.u32	v[0..31], v[0..31]
vrsqrt.8x128.f32	erf, v[0..31]
vsel.8x128	v[0..31], vm0, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm1, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm2, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm3, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm4, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm5, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm6, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm7, v[0..31] / s[0..31] / u32, v[0..31]
vsmask	vm[0..31], v[0..31] / s[0..31] / u32
vsub.8x128.s32	v[0..31], v[0..31] / s[0..31] / i32, v[0..31]
vtanh.8x128.f32	erf, v[0..31]
vunpackl.8x128.f16.f32	v[0..31], v[0..31]
vunpacku.8x128.f16.f32	v[0..31], v[0..31]
vweird.8x128.f32	vm[0..31], v[0..31]
vxor.8x128.u32	v[0..31], v[0..31] / s[0..31] / u32, v[0..31]

va1

助记符	按顺序排列的操作数类型
getrngseed	v[0..31]
setrngseed	v[0..31]
vadd.8x128.f32	v[0..31], v[0..31] / s[0..31] / f32, v[0..31]
vadd.8x128.s32	v[0..31], v[0..31] / s[0..31] / i32, v[0..31]
vand.8x128.u32	v[0..31], v[0..31] / s[0..31] / u32, v[0..31]
vc.8x128.u32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vclamp.gez.8x128.f32	v[0..31], v[0..31], v[0..31] / s[0..31] / f32
vclamps.8x128.f32	v[0..31], v[0..31], v[0..31] / s[0..31] / f32
vclz	v[0..31], v[0..31]
vcvt.8x128.f32.s32	v[0..31], v[0..31], v[0..31] / s[0..31] / u32
vcvt.8x128.s32.f32	v[0..31], v[0..31]
veq.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
veq.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vf32.e.s32	v[0..31], v[0..31]
vf32.f32	v[0..31], v[0..31] / s[0..31] / u32, v[0..31]
vf32.s.s32	v[0..31], v[0..31]
vge.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vge.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vgt.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vgt.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vimm.8x128.s32	v[0..31], i32
vlaneseq.8x128.u32	v[0..31]
vle.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vle.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vlmask	vm[0..31], v[0..31] / s[0..31] / u32
vlog2.8x128.f32	erf, v[0..31]
vlt.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vlt.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vmax.8x128.f32	v[0..31], v[0..31], v[0..31] / s[0..31] / f32
vmin.8x128.f32	v[0..31], v[0..31], v[0..31] / s[0..31] / f32
vmov.8x128	v[0..31], v[0..31] / s[0..31]
vne.8x128.f32	vm[0..31], v[0..31], v[0..31] / s[0..31] / f32
vne.8x128.s32	vm[0..31], v[0..31], v[0..31] / s[0..31] / i32
vor.8x128.u32	v[0..31], v[0..31] / s[0..31] / u32, v[0..31]
vpack.8x128.f32.f16	v[0..31], v[0..31] / s[0..31] / f32, v[0..31]
vpackc.8x128.f32.f16	v[0..31], v[0..31] / s[0..31] / f32, v[0..31]
vpcnt	v[0..31], v[0..31]
vpow2.8x128.f32	erf, v[0..31]
vpush.8x128	erf, v[0..31]
vrcp.8x128.f32	erf, v[0..31]
vrng.8x128.u32	v[0..31]
vrot.slane.down.8x128.u32	v[0..31], v[0..31]
vrshra.8x128.s32	v[0..31], v[0..31], v[0..31] / s[0..31] / u32
vrsqrt.8x128.f32	erf, v[0..31]
vsel.8x128	v[0..31], vm0, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm1, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm2, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm3, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm4, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm5, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm6, v[0..31] / s[0..31] / u32, v[0..31] v[0..31], vm7, v[0..31] / s[0..31] / u32, v[0..31]
vshll.8x128.s32	v[0..31], v[0..31], v[0..31] / s[0..31] / u32
vshra.8x128.s32	v[0..31], v[0..31], v[0..31] / s[0..31] / u32
vshrl.8x128.s32	v[0..31], v[0..31], v[0..31] / s[0..31] / u32
vsmask	vm[0..31], v[0..31] / s[0..31] / u32
vsub.8x128.f32	v[0..31], v[0..31] / s[0..31] / f32, v[0..31]
vsub.8x128.s32	v[0..31], v[0..31] / s[0..31] / i32, v[0..31]
vtanh.8x128.f32	erf, v[0..31]
vunpackl.8x128.f16.f32	v[0..31], v[0..31]
vunpacku.8x128.f16.f32	v[0..31], v[0..31]
vweird.8x128.f32	vm[0..31], v[0..31]
vxor.8x128.u32	v[0..31], v[0..31] / s[0..31] / u32, v[0..31]

vst

助记符	按顺序排列的操作数类型
cst.8x128	[cmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], v[0..31] [cmem:(0 / s[0..31] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], v[0..31]
vpush	v2sf, v[0..31]
vsetiar.lane	iar[0..1], v[0..31]
vsetiar.raw	iar[0..1], v[0..31]
vsetiar.sublane	iar[0..1], v[0..31]
vst.8x128	[vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], v[0..31] [vmem:(0 / s[0..31] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], v[0..31]
vst.iar.8x128	[vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], v[0..31]
vst.iar.msk.8x128	[vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], vm0, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], vm1, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], vm2, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], vm3, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], vm4, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], vm5, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], vm6, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], iar[0..1], vm7, v[0..31]
vst.msk.8x128	[vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], vm0, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], vm1, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], vm2, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], vm3, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], vm4, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], vm5, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], vm6, v[0..31] [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])], vm7, v[0..31]

vld

助记符	按顺序排列的操作数类型
vld.8x128	v[0..31], [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])]
vld.iar0.8x128	v[0..31], [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])]
vld.iar1.8x128	v[0..31], [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])]
vld.sshfl.8x128	v[0..31], [vmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)])], s[0..31] / u32

cld

助记符	按顺序排列的操作数类型
cld.8x128	crf, [cmem:(0 / s[0..31] [+ (u16)] [, sm=(s[0..31] / u16)] [, ss=(s[0..31] / u16)])]

vx0

助记符	按顺序排列的操作数类型
vadd.xlane.0.8x128.f32	trf0, v[0..31]
vadd.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vadd.xlane.1.8x128.f32	trf1, v[0..31]
vadd.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vadd.xlane.2.8x128.f32	trf0, v[0..31]
vadd.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vadd.xlane.3.8x128.f32	trf1, v[0..31]
vadd.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vdwg.128x128.f16	gmr[0..3], gsfn[0..3] gmr[0..3], gsft[0..3]
vmatmul.8x128.f32	mrf0, v[0..31] mrf1, v[0..31] mrf2, v[0..31] mrf3, v[0..31]
vmatmul.dwg.8x128.f32	(gmr0, gsfn0, mrf0), v[0..31] (gmr1, gsfn1, mrf1), v[0..31] (gmr2, gsfn2, mrf2), v[0..31] (gmr3, gsfn3, mrf3), v[0..31] (gmr0, gsft0, mrf0), v[0..31] (gmr1, gsft1, mrf1), v[0..31] (gmr2, gsft2, mrf2), v[0..31] (gmr3, gsft3, mrf3), v[0..31]
vmatmul.hi.8x128.f32	mrf0, v[0..31] mrf1, v[0..31] mrf2, v[0..31] mrf3, v[0..31]
vmatmul.hi.dwg.8x128.f32	(gmr0, gsfn0, mrf0), v[0..31] (gmr1, gsfn1, mrf1), v[0..31] (gmr2, gsfn2, mrf2), v[0..31] (gmr3, gsfn3, mrf3), v[0..31] (gmr0, gsft0, mrf0), v[0..31] (gmr1, gsft1, mrf1), v[0..31] (gmr2, gsft2, mrf2), v[0..31] (gmr3, gsft3, mrf3), v[0..31]
vmatmul.hi.msk.8x128.f32	mrf0, vm[0..7], v[0..31] mrf1, vm[0..7], v[0..31] mrf2, vm[0..7], v[0..31] mrf3, vm[0..7], v[0..31]
vmatmul.hi.msk.dwg.8x128.f32	(gmr0, gsfn0, mrf0), vm[0..7], v[0..31] (gmr1, gsfn1, mrf1), vm[0..7], v[0..31] (gmr2, gsfn2, mrf2), vm[0..7], v[0..31] (gmr3, gsfn3, mrf3), vm[0..7], v[0..31] (gmr0, gsft0, mrf0), vm[0..7], v[0..31] (gmr1, gsft1, mrf1), vm[0..7], v[0..31] (gmr2, gsft2, mrf2), vm[0..7], v[0..31] (gmr3, gsft3, mrf3), vm[0..7], v[0..31]
vmatmul.low.8x128.f32	mrf0, v[0..31] mrf1, v[0..31] mrf2, v[0..31] mrf3, v[0..31]
vmatmul.low.dwg.8x128.f32	(gmr0, gsfn0, mrf0), v[0..31] (gmr1, gsfn1, mrf1), v[0..31] (gmr2, gsfn2, mrf2), v[0..31] (gmr3, gsfn3, mrf3), v[0..31] (gmr0, gsft0, mrf0), v[0..31] (gmr1, gsft1, mrf1), v[0..31] (gmr2, gsft2, mrf2), v[0..31] (gmr3, gsft3, mrf3), v[0..31]
vmatmul.low.msk.8x128.f32	mrf0, vm[0..7], v[0..31] mrf1, vm[0..7], v[0..31] mrf2, vm[0..7], v[0..31] mrf3, vm[0..7], v[0..31]
vmatmul.low.msk.dwg.8x128.f32	(gmr0, gsfn0, mrf0), vm[0..7], v[0..31] (gmr1, gsfn1, mrf1), vm[0..7], v[0..31] (gmr2, gsfn2, mrf2), vm[0..7], v[0..31] (gmr3, gsfn3, mrf3), vm[0..7], v[0..31] (gmr0, gsft0, mrf0), vm[0..7], v[0..31] (gmr1, gsft1, mrf1), vm[0..7], v[0..31] (gmr2, gsft2, mrf2), vm[0..7], v[0..31] (gmr3, gsft3, mrf3), vm[0..7], v[0..31]
vmatmul.msk.8x128.f32	mrf0, vm[0..7], v[0..31] mrf1, vm[0..7], v[0..31] mrf2, vm[0..7], v[0..31] mrf3, vm[0..7], v[0..31]
vmatmul.msk.dwg.8x128.f32	(gmr0, gsfn0, mrf0), vm[0..7], v[0..31] (gmr1, gsfn1, mrf1), vm[0..7], v[0..31] (gmr2, gsfn2, mrf2), vm[0..7], v[0..31] (gmr3, gsfn3, mrf3), vm[0..7], v[0..31] (gmr0, gsft0, mrf0), vm[0..7], v[0..31] (gmr1, gsft1, mrf1), vm[0..7], v[0..31] (gmr2, gsft2, mrf2), vm[0..7], v[0..31] (gmr3, gsft3, mrf3), vm[0..7], v[0..31]
vmatmul.packed.8x128.f16	mrf0, v[0..31] mrf1, v[0..31] mrf2, v[0..31] mrf3, v[0..31]
vmatmul.packed.dwg.8x128.f16	(gmr0, gsfn0, mrf0), v[0..31] (gmr1, gsfn1, mrf1), v[0..31] (gmr2, gsfn2, mrf2), v[0..31] (gmr3, gsfn3, mrf3), v[0..31] (gmr0, gsft0, mrf0), v[0..31] (gmr1, gsft1, mrf1), v[0..31] (gmr2, gsft2, mrf2), v[0..31] (gmr3, gsft3, mrf3), v[0..31]
vmatmul.packed.msk.8x128.f16	mrf0, vm[0..7], v[0..31] mrf1, vm[0..7], v[0..31] mrf2, vm[0..7], v[0..31] mrf3, vm[0..7], v[0..31]
vmatmul.packed.msk.dwg.8x128.f16	(gmr0, gsfn0, mrf0), vm[0..7], v[0..31] (gmr1, gsfn1, mrf1), vm[0..7], v[0..31] (gmr2, gsfn2, mrf2), vm[0..7], v[0..31] (gmr3, gsfn3, mrf3), vm[0..7], v[0..31] (gmr0, gsft0, mrf0), vm[0..7], v[0..31] (gmr1, gsft1, mrf1), vm[0..7], v[0..31] (gmr2, gsft2, mrf2), vm[0..7], v[0..31] (gmr3, gsft3, mrf3), vm[0..7], v[0..31]
vmatpush.8x128.f32	gsfn[0..3], v[0..31]
vmatpush.byte.8x128.s8	gsfn[0..3], v[0..31]
vmatpush.byte.msk.8x128.s8	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.byte.xpose.8x128.s8	gsft[0..3], v[0..31]
vmatpush.byte.xpose.msk.8x128.s8	gsft[0..3], vm[0..7], v[0..31]
vmatpush.hi.8x128.f32	gsfn[0..3], v[0..31]
vmatpush.hi.msk.8x128.f32	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.hi.xpose.8x128.f32	gsft[0..3], v[0..31]
vmatpush.hi.xpose.msk.8x128.f32	gsft[0..3], vm[0..7], v[0..31]
vmatpush.low.8x128.f32	gsfn[0..3], v[0..31]
vmatpush.low.msk.8x128.f32	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.low.xpose.8x128.f32	gsft[0..3], v[0..31]
vmatpush.low.xpose.msk.8x128.f32	gsft[0..3], vm[0..7], v[0..31]
vmatpush.msk.8x128.f32	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.packed.8x128.f16	gsfn[0..3], v[0..31]
vmatpush.packed.msk.8x128.f16	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.packed.xpose.8x128.f16	gsft[0..3], v[0..31]
vmatpush.packed.xpose.msk.8x128.f16	gsft[0..3], vm[0..7], v[0..31]
vmatpush.xpose.8x128.f32	gsft[0..3], v[0..31]
vmatpush.xpose.msk.8x128.f32	gsft[0..3], vm[0..7], v[0..31]
vmax.index.xlane.0.8x128.f32	trf0, v[0..31]
vmax.index.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vmax.index.xlane.1.8x128.f32	trf1, v[0..31]
vmax.index.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vmax.index.xlane.2.8x128.f32	trf0, v[0..31]
vmax.index.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vmax.index.xlane.3.8x128.f32	trf1, v[0..31]
vmax.index.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vmax.xlane.0.8x128.f32	trf0, v[0..31]
vmax.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vmax.xlane.1.8x128.f32	trf1, v[0..31]
vmax.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vmax.xlane.2.8x128.f32	trf0, v[0..31]
vmax.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vmax.xlane.3.8x128.f32	trf1, v[0..31]
vmax.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vmin.index.xlane.0.8x128.f32	trf0, v[0..31]
vmin.index.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vmin.index.xlane.1.8x128.f32	trf1, v[0..31]
vmin.index.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vmin.index.xlane.2.8x128.f32	trf0, v[0..31]
vmin.index.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vmin.index.xlane.3.8x128.f32	trf1, v[0..31]
vmin.index.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vmin.xlane.0.8x128.f32	trf0, v[0..31]
vmin.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vmin.xlane.1.8x128.f32	trf1, v[0..31]
vmin.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vmin.xlane.2.8x128.f32	trf0, v[0..31]
vmin.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vmin.xlane.3.8x128.f32	trf1, v[0..31]
vmin.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vperm.0.8x128	trf0, v[0..31]
vperm.0.packed.8x128	trf0, v[0..31]
vperm.1.8x128	trf1, v[0..31]
vperm.1.packed.8x128	trf1, v[0..31]
vperm.2.8x128	trf0, v[0..31]
vperm.2.packed.8x128	trf0, v[0..31]
vperm.3.8x128	trf1, v[0..31]
vperm.3.packed.8x128	trf1, v[0..31]
vrot.0.8x128	trf0, v[0..31], s[0..31] / u16
vrot.0.packed.8x128	trf0, v[0..31], s[0..31] / u16
vrot.1.8x128	trf1, v[0..31], s[0..31] / u16
vrot.1.packed.8x128	trf1, v[0..31], s[0..31] / u16
vrot.2.8x128	trf0, v[0..31], s[0..31] / u16
vrot.2.packed.8x128	trf0, v[0..31], s[0..31] / u16
vrot.3.8x128	trf1, v[0..31], s[0..31] / u16
vrot.3.packed.8x128	trf1, v[0..31], s[0..31] / u16
vsetperm.0.all.bytes.u32	pcr0, v[0..31]
vsetperm.0.all.u8	pcr0, v[0..31]
vsetperm.0.u8	pcr0, v[0..31]
vsetperm.1.all.bytes.u32	pcr1, v[0..31]
vsetperm.1.all.u8	pcr1, v[0..31]
vsetperm.1.u8	pcr1, v[0..31]
vsetperm.2.all.bytes.u32	pcr0, v[0..31]
vsetperm.2.all.u8	pcr0, v[0..31]
vsetperm.2.u8	pcr0, v[0..31]
vsetperm.3.all.bytes.u32	pcr1, v[0..31]
vsetperm.3.all.u8	pcr1, v[0..31]
vsetperm.3.u8	pcr1, v[0..31]
vsetspr.0.u1	spr0, v[0..31]
vsetspr.1.u1	spr1, v[0..31]
vsetspr.2.u1	spr0, v[0..31]
vsetspr.3.u1	spr1, v[0..31]
vsupp.0.8x128	trf0, v[0..31]
vsupp.1.8x128	trf1, v[0..31]
vsupp.2.8x128	trf0, v[0..31]
vsupp.3.8x128	trf1, v[0..31]
vsxpose.0.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.packed.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.packed.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.packed.start.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.packed.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.start.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.1.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.packed.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.packed.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.packed.start.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.packed.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.start.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.2.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.packed.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.packed.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.packed.start.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.packed.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.start.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.3.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.packed.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.packed.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.packed.start.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.packed.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.start.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.0.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.packed.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.packed.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.packed.start.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.packed.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.start.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.1.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.packed.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.packed.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.packed.start.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.packed.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.start.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.2.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.packed.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.packed.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.packed.start.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.packed.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.start.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.3.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.packed.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.packed.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.packed.start.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.packed.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.start.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.start.end.8x128	trf1, v[0..31], s[0..31] / u16

vx1

助记符	按顺序排列的操作数类型
vadd.xlane.0.8x128.f32	trf0, v[0..31]
vadd.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vadd.xlane.1.8x128.f32	trf1, v[0..31]
vadd.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vadd.xlane.2.8x128.f32	trf0, v[0..31]
vadd.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vadd.xlane.3.8x128.f32	trf1, v[0..31]
vadd.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vdwg.128x128.f16	gmr[0..3], gsfn[0..3] gmr[0..3], gsft[0..3]
vmatmul.8x128.f32	mrf0, v[0..31] mrf1, v[0..31] mrf2, v[0..31] mrf3, v[0..31]
vmatmul.dwg.8x128.f32	(gmr0, gsfn0, mrf0), v[0..31] (gmr1, gsfn1, mrf1), v[0..31] (gmr2, gsfn2, mrf2), v[0..31] (gmr3, gsfn3, mrf3), v[0..31] (gmr0, gsft0, mrf0), v[0..31] (gmr1, gsft1, mrf1), v[0..31] (gmr2, gsft2, mrf2), v[0..31] (gmr3, gsft3, mrf3), v[0..31]
vmatmul.hi.8x128.f32	mrf0, v[0..31] mrf1, v[0..31] mrf2, v[0..31] mrf3, v[0..31]
vmatmul.hi.dwg.8x128.f32	(gmr0, gsfn0, mrf0), v[0..31] (gmr1, gsfn1, mrf1), v[0..31] (gmr2, gsfn2, mrf2), v[0..31] (gmr3, gsfn3, mrf3), v[0..31] (gmr0, gsft0, mrf0), v[0..31] (gmr1, gsft1, mrf1), v[0..31] (gmr2, gsft2, mrf2), v[0..31] (gmr3, gsft3, mrf3), v[0..31]
vmatmul.hi.msk.8x128.f32	mrf0, vm[0..7], v[0..31] mrf1, vm[0..7], v[0..31] mrf2, vm[0..7], v[0..31] mrf3, vm[0..7], v[0..31]
vmatmul.hi.msk.dwg.8x128.f32	(gmr0, gsfn0, mrf0), vm[0..7], v[0..31] (gmr1, gsfn1, mrf1), vm[0..7], v[0..31] (gmr2, gsfn2, mrf2), vm[0..7], v[0..31] (gmr3, gsfn3, mrf3), vm[0..7], v[0..31] (gmr0, gsft0, mrf0), vm[0..7], v[0..31] (gmr1, gsft1, mrf1), vm[0..7], v[0..31] (gmr2, gsft2, mrf2), vm[0..7], v[0..31] (gmr3, gsft3, mrf3), vm[0..7], v[0..31]
vmatmul.low.8x128.f32	mrf0, v[0..31] mrf1, v[0..31] mrf2, v[0..31] mrf3, v[0..31]
vmatmul.low.dwg.8x128.f32	(gmr0, gsfn0, mrf0), v[0..31] (gmr1, gsfn1, mrf1), v[0..31] (gmr2, gsfn2, mrf2), v[0..31] (gmr3, gsfn3, mrf3), v[0..31] (gmr0, gsft0, mrf0), v[0..31] (gmr1, gsft1, mrf1), v[0..31] (gmr2, gsft2, mrf2), v[0..31] (gmr3, gsft3, mrf3), v[0..31]
vmatmul.low.msk.8x128.f32	mrf0, vm[0..7], v[0..31] mrf1, vm[0..7], v[0..31] mrf2, vm[0..7], v[0..31] mrf3, vm[0..7], v[0..31]
vmatmul.low.msk.dwg.8x128.f32	(gmr0, gsfn0, mrf0), vm[0..7], v[0..31] (gmr1, gsfn1, mrf1), vm[0..7], v[0..31] (gmr2, gsfn2, mrf2), vm[0..7], v[0..31] (gmr3, gsfn3, mrf3), vm[0..7], v[0..31] (gmr0, gsft0, mrf0), vm[0..7], v[0..31] (gmr1, gsft1, mrf1), vm[0..7], v[0..31] (gmr2, gsft2, mrf2), vm[0..7], v[0..31] (gmr3, gsft3, mrf3), vm[0..7], v[0..31]
vmatmul.msk.8x128.f32	mrf0, vm[0..7], v[0..31] mrf1, vm[0..7], v[0..31] mrf2, vm[0..7], v[0..31] mrf3, vm[0..7], v[0..31]
vmatmul.msk.dwg.8x128.f32	(gmr0, gsfn0, mrf0), vm[0..7], v[0..31] (gmr1, gsfn1, mrf1), vm[0..7], v[0..31] (gmr2, gsfn2, mrf2), vm[0..7], v[0..31] (gmr3, gsfn3, mrf3), vm[0..7], v[0..31] (gmr0, gsft0, mrf0), vm[0..7], v[0..31] (gmr1, gsft1, mrf1), vm[0..7], v[0..31] (gmr2, gsft2, mrf2), vm[0..7], v[0..31] (gmr3, gsft3, mrf3), vm[0..7], v[0..31]
vmatmul.packed.8x128.f16	mrf0, v[0..31] mrf1, v[0..31] mrf2, v[0..31] mrf3, v[0..31]
vmatmul.packed.dwg.8x128.f16	(gmr0, gsfn0, mrf0), v[0..31] (gmr1, gsfn1, mrf1), v[0..31] (gmr2, gsfn2, mrf2), v[0..31] (gmr3, gsfn3, mrf3), v[0..31] (gmr0, gsft0, mrf0), v[0..31] (gmr1, gsft1, mrf1), v[0..31] (gmr2, gsft2, mrf2), v[0..31] (gmr3, gsft3, mrf3), v[0..31]
vmatmul.packed.msk.8x128.f16	mrf0, vm[0..7], v[0..31] mrf1, vm[0..7], v[0..31] mrf2, vm[0..7], v[0..31] mrf3, vm[0..7], v[0..31]
vmatmul.packed.msk.dwg.8x128.f16	(gmr0, gsfn0, mrf0), vm[0..7], v[0..31] (gmr1, gsfn1, mrf1), vm[0..7], v[0..31] (gmr2, gsfn2, mrf2), vm[0..7], v[0..31] (gmr3, gsfn3, mrf3), vm[0..7], v[0..31] (gmr0, gsft0, mrf0), vm[0..7], v[0..31] (gmr1, gsft1, mrf1), vm[0..7], v[0..31] (gmr2, gsft2, mrf2), vm[0..7], v[0..31] (gmr3, gsft3, mrf3), vm[0..7], v[0..31]
vmatpush.8x128.f32	gsfn[0..3], v[0..31]
vmatpush.byte.8x128.s8	gsfn[0..3], v[0..31]
vmatpush.byte.msk.8x128.s8	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.byte.xpose.8x128.s8	gsft[0..3], v[0..31]
vmatpush.byte.xpose.msk.8x128.s8	gsft[0..3], vm[0..7], v[0..31]
vmatpush.hi.8x128.f32	gsfn[0..3], v[0..31]
vmatpush.hi.msk.8x128.f32	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.hi.xpose.8x128.f32	gsft[0..3], v[0..31]
vmatpush.hi.xpose.msk.8x128.f32	gsft[0..3], vm[0..7], v[0..31]
vmatpush.low.8x128.f32	gsfn[0..3], v[0..31]
vmatpush.low.msk.8x128.f32	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.low.xpose.8x128.f32	gsft[0..3], v[0..31]
vmatpush.low.xpose.msk.8x128.f32	gsft[0..3], vm[0..7], v[0..31]
vmatpush.msk.8x128.f32	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.packed.8x128.f16	gsfn[0..3], v[0..31]
vmatpush.packed.msk.8x128.f16	gsfn[0..3], vm[0..7], v[0..31]
vmatpush.packed.xpose.8x128.f16	gsft[0..3], v[0..31]
vmatpush.packed.xpose.msk.8x128.f16	gsft[0..3], vm[0..7], v[0..31]
vmatpush.xpose.8x128.f32	gsft[0..3], v[0..31]
vmatpush.xpose.msk.8x128.f32	gsft[0..3], vm[0..7], v[0..31]
vmax.index.xlane.0.8x128.f32	trf0, v[0..31]
vmax.index.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vmax.index.xlane.1.8x128.f32	trf1, v[0..31]
vmax.index.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vmax.index.xlane.2.8x128.f32	trf0, v[0..31]
vmax.index.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vmax.index.xlane.3.8x128.f32	trf1, v[0..31]
vmax.index.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vmax.xlane.0.8x128.f32	trf0, v[0..31]
vmax.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vmax.xlane.1.8x128.f32	trf1, v[0..31]
vmax.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vmax.xlane.2.8x128.f32	trf0, v[0..31]
vmax.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vmax.xlane.3.8x128.f32	trf1, v[0..31]
vmax.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vmin.index.xlane.0.8x128.f32	trf0, v[0..31]
vmin.index.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vmin.index.xlane.1.8x128.f32	trf1, v[0..31]
vmin.index.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vmin.index.xlane.2.8x128.f32	trf0, v[0..31]
vmin.index.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vmin.index.xlane.3.8x128.f32	trf1, v[0..31]
vmin.index.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vmin.xlane.0.8x128.f32	trf0, v[0..31]
vmin.xlane.0.seg.perm.8x128.f32	trf0, v[0..31]
vmin.xlane.1.8x128.f32	trf1, v[0..31]
vmin.xlane.1.seg.perm.8x128.f32	trf1, v[0..31]
vmin.xlane.2.8x128.f32	trf0, v[0..31]
vmin.xlane.2.seg.perm.8x128.f32	trf0, v[0..31]
vmin.xlane.3.8x128.f32	trf1, v[0..31]
vmin.xlane.3.seg.perm.8x128.f32	trf1, v[0..31]
vperm.0.8x128	trf0, v[0..31]
vperm.0.packed.8x128	trf0, v[0..31]
vperm.1.8x128	trf1, v[0..31]
vperm.1.packed.8x128	trf1, v[0..31]
vperm.2.8x128	trf0, v[0..31]
vperm.2.packed.8x128	trf0, v[0..31]
vperm.3.8x128	trf1, v[0..31]
vperm.3.packed.8x128	trf1, v[0..31]
vrot.0.8x128	trf0, v[0..31], s[0..31] / u16
vrot.0.packed.8x128	trf0, v[0..31], s[0..31] / u16
vrot.1.8x128	trf1, v[0..31], s[0..31] / u16
vrot.1.packed.8x128	trf1, v[0..31], s[0..31] / u16
vrot.2.8x128	trf0, v[0..31], s[0..31] / u16
vrot.2.packed.8x128	trf0, v[0..31], s[0..31] / u16
vrot.3.8x128	trf1, v[0..31], s[0..31] / u16
vrot.3.packed.8x128	trf1, v[0..31], s[0..31] / u16
vsetperm.0.all.bytes.u32	pcr0, v[0..31]
vsetperm.0.all.u8	pcr0, v[0..31]
vsetperm.0.u8	pcr0, v[0..31]
vsetperm.1.all.bytes.u32	pcr1, v[0..31]
vsetperm.1.all.u8	pcr1, v[0..31]
vsetperm.1.u8	pcr1, v[0..31]
vsetperm.2.all.bytes.u32	pcr0, v[0..31]
vsetperm.2.all.u8	pcr0, v[0..31]
vsetperm.2.u8	pcr0, v[0..31]
vsetperm.3.all.bytes.u32	pcr1, v[0..31]
vsetperm.3.all.u8	pcr1, v[0..31]
vsetperm.3.u8	pcr1, v[0..31]
vsetspr.0.u1	spr0, v[0..31]
vsetspr.1.u1	spr1, v[0..31]
vsetspr.2.u1	spr0, v[0..31]
vsetspr.3.u1	spr1, v[0..31]
vsxpose.0.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.packed.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.packed.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.packed.start.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.packed.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.start.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.0.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.1.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.packed.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.packed.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.packed.start.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.packed.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.start.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.1.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.2.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.packed.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.packed.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.packed.start.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.packed.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.start.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.2.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vsxpose.3.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.packed.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.packed.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.packed.start.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.packed.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.start.8x128	trf1, v[0..31], s[0..31] / u16
vsxpose.3.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.0.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.packed.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.packed.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.packed.start.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.packed.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.start.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.0.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.1.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.packed.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.packed.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.packed.start.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.packed.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.start.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.1.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.2.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.packed.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.packed.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.packed.start.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.packed.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.start.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.2.start.end.8x128	trf0, v[0..31], s[0..31] / u16
vxpose.3.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.packed.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.packed.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.packed.start.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.packed.start.end.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.start.8x128	trf1, v[0..31], s[0..31] / u16
vxpose.3.start.end.8x128	trf1, v[0..31], s[0..31] / u16

vr0

助记符	按顺序排列的操作数类型
vpop.8x128	v[0..31], erf v[0..31], mrf[0..3] v[0..31], trf[0..1] v[0..31], crf

vr1

助记符	按顺序排列的操作数类型
vpop.8x128	v[0..31], erf v[0..31], mrf[0..3] v[0..31], trf[0..1] v[0..31], crf

misc

助记符	按顺序排列的操作数类型
cfence	无操作数
vdelay	u4(>= 1) s[0..31] / u16
vint	s[0..31] / u16
vmand.8x128.u1	vm[0..7], vm[0..7], vm[0..7]
vmmov.8x128.u1	vm[0..7], vm[0..7]
vmneg.8x128.u1	vm[0..7], vm[0..7]
vmor.8x128.u1	vm[0..7], vm[0..7], vm[0..7]
vmxor.8x128.u1	vm[0..7], vm[0..7], vm[0..7]
vnop	无操作数
vsettm	s[0..31] / u16
vsyncadd.done.s32	[sflag:(s[0..31] / u16)], s[0..31] / i16
vsyncadd.notdone.s32	[sflag:(s[0..31] / u16)], s[0..31] / i16
vsyncadd.remote.s32	[sflag:(s[0..31] / u16)], s[0..31] / i16
vsyncadd.s32	[sflag:(s[0..31] / u16)], s[0..31] / i16
vsyncdonemov	v2sf, [sflag:(s[0..31] / u16)]
vsyncmov	v2sf, [sflag:(s[0..31] / u16)]
vsyncpa.u1	[sflag:(s[0..31] / u16)], s[0..31] / i16
vsyncset.done.s32	[sflag:(s[0..31] / u16)], s[0..31] / i16
vsyncset.notdone.s32	[sflag:(s[0..31] / u16)], s[0..31] / i16
vsyncset.remote.s32	[sflag:(s[0..31] / u16)], s[0..31] / i16
vsyncset.s32	[sflag:(s[0..31] / u16)], s[0..31] / i16
vtrace	s[0..31] / u32
vwait.done	[sflag:(s[0..31] / u16)]
vwait.eq	[sflag:(s[0..31] / u16)], s[0..31] / i16
vwait.ge	[sflag:(s[0..31] / u16)], s[0..31] / i16
vwait.gt	[sflag:(s[0..31] / u16)], s[0..31] / i16
vwait.lt	[sflag:(s[0..31] / u16)], s[0..31] / i16
vwait.ne	[sflag:(s[0..31] / u16)], s[0..31] / i16