TPU v6e TC 指令索引

TPU v6e TC 指令索引#

由 libtpu 0.0.49 的 descriptor、encoder 与 formatter 生成：登记 476 种形式、1214 个槽与形式组合、1494 条展开签名、1397 个槽与助记符组合。encoder 拒绝的 81 个槽与形式组合不登记。这里的覆盖是编码、解码与重汇编覆盖，不是设备执行覆盖。

如何阅读#

s[0..31]、v[0..63] 表示寄存器编号，/ 表示可选的拼写，iN/uN/f32 是数值类型，地址内部的圆括号用于分组，[+ …]、[, sm=…] 与 [, ss=…] 是可选部分。数值类型只限定输入位宽，立即数槽和整个指令包的资源是否够用由汇编器检查。

谓词前缀为 @p0..@p13；只有 s0、s1、dma 接受 @!pN。某个助记符只出现在部分槽的表中，表示 encoder 在其他槽拒绝该形式。vmul.8x128.u32.u64 在 va0 时占用 va1、在 va2 时占用 va3；dma 不能与 s0、s1 同时出现。

DMA 的 端点 是以下地址空间之一：vmem、smem、imem、hbm、host、vmem_all、vmem0、smem0、imem0、spmem0、ssmem0、simem0、timem0、spmem1、ssmem1、simem1、timem1，其余 core id 与 memory id 组合写作 coreC_memM。DMA 的具名参数可以换序；方括号括起的具名参数可以省略，省略时取 0。

以下助记符的形式没有 formatter 输出，名称由 tpuasm 按同族写法给出，操作数按 descriptor 字段顺序排列，没有 formatter 文本可对照，执行结果已在设备上核对：vbcast.lane.packed.b8.8x128、vc.8x128.u16、vmul.8x128.u16、vremap.8x128.bf16、vremap.8x128.f32、vrot.lane.packed.b8.8x128、vsetperm.half.u8、vwait.done.yield、vwait.eq.yield、vwait.ge.yield、vwait.gt.yield、vwait.lt.yield、vwait.ne.yield、vwait.notdone.yield、vweird.8x128.bf16。其余助记符与操作数顺序取自 libtpu formatter。写法见格式参考。

按槽查找#

s0 · s1 · dma · va0 · va1 · va2 · va3 · vst · vld0 · vld1 · misc · vx0 · vx1 · vr0 · vr1

s0#

助记符

按顺序排列的操作数类型

por

p[0..13], p[0..13] / !p[0..13] / 1 / 0, p[0..13] / !p[0..13] / 1 / 0

sadd.ov.s32

s[0..31], s[0..31] / i32, s[0..31]

sadd.s32

s[0..31], s[0..31] / i32, s[0..31]

sand.u32

s[0..31], s[0..31] / u32, s[0..31]

sbr.abs

label / u20

sbr.ind

s[0..31]

sbr.rel

label / i20

sc.u32

p[0..13], s[0..31], s[0..31] / u32

scall.abs

s[0..31], label / u20

scall.ind

s[0..31], s[0..31]

scall.rel

s[0..31], label / i20

sceil.f32

s[0..31], s[0..31] / f32

sclz.u32

s[0..31], s[0..31] / u32

scvt.f32.s32

s[0..31], s[0..31] / f32

scvt.s32.f32

s[0..31], s[0..31] / i32

sdelay

u11

sdiv.u32

drf, s[0..31], s[0..31] / u32

sdivrem.u32

drf, s[0..31], s[0..31] / u32

seq.f32

p[0..13], s[0..31], s[0..31] / f32

seq.s32

p[0..13], s[0..31], s[0..31] / i32

sfence

无操作数

sfloor.f32

s[0..31], s[0..31] / f32

sge.f32

p[0..13], s[0..31], s[0..31] / f32

sge.s32

p[0..13], s[0..31], s[0..31] / i32

sge.u32

p[0..13], s[0..31], s[0..31] / u32

sgt.f32

p[0..13], s[0..31], s[0..31] / f32

sgt.s32

p[0..13], s[0..31], s[0..31] / i32

sgt.u32

p[0..13], s[0..31], s[0..31] / u32

shalt

无操作数

shalt.yield.cond

无操作数

simm.s32

s[0..31], i32

sle.f32

p[0..13], s[0..31], s[0..31] / f32

sle.s32

p[0..13], s[0..31], s[0..31] / i32

sle.u32

p[0..13], s[0..31], s[0..31] / u32

slt.f32

p[0..13], s[0..31], s[0..31] / f32

slt.s32

p[0..13], s[0..31], s[0..31] / i32

slt.u32

p[0..13], s[0..31], s[0..31] / u32

smax.f32

s[0..31], s[0..31], s[0..31] / f32

smax.u32

s[0..31], s[0..31], s[0..31] / u32

smin.f32

s[0..31], s[0..31], s[0..31] / f32

smin.u32

s[0..31], s[0..31], s[0..31] / u32

smov

s[0..31], s[0..31]

smul.f32

s[0..31], s[0..31] / f32, s[0..31]

smul.u32

s[0..31], s[0..31] / u32, s[0..31]

smulhi.u32

s[0..31], s[0..31] / u32, s[0..31]

sne.f32

p[0..13], s[0..31], s[0..31] / f32

sne.s32

p[0..13], s[0..31], s[0..31] / i32

sor.u32

s[0..31], s[0..31] / u32, s[0..31]

spop

s[0..31], v2sf
s[0..31], drf
s[0..31], sfrf

srdreg.gtchi

s[0..31]

srdreg.gtclo

s[0..31]

srdreg.lcchi

s[0..31]

srdreg.lcclo

s[0..31]

srdreg.tag

s[0..31]

srdreg.tcid

s[0..31]

srdreg.tm

s[0..31]

srdreg.yieldreq

s[0..31]

srem.u32

drf, s[0..31], s[0..31] / u32

ssettag

s[0..31] / u32

sshla.ov.s32

s[0..31], s[0..31], s[0..31] / u32

sshll.u32

s[0..31], s[0..31], s[0..31] / u32

sshra.s32

s[0..31], s[0..31], s[0..31] / u32

sshrl.u32

s[0..31], s[0..31], s[0..31] / u32

ssub.ov.s32

s[0..31], s[0..31] / i32, s[0..31]

ssub.s32

s[0..31], s[0..31] / i32, s[0..31]

sweird.f32

p[0..13], s[0..31]

sxor.u32

s[0..31], s[0..31] / u32, s[0..31]

s1#

助记符

按顺序排列的操作数类型

dma.desc

[smem:(s[0..31] / u32)]

por

p[0..13], p[0..13] / !p[0..13] / 1 / 0, p[0..13] / !p[0..13] / 1 / 0

sadd.f32

s[0..31], s[0..31] / f32, s[0..31]

sadd.ov.s32

s[0..31], s[0..31] / i32, s[0..31]

sadd.s32

s[0..31], s[0..31] / i32, s[0..31]

sand.u32

s[0..31], s[0..31] / u32, s[0..31]

sc.u32

p[0..13], s[0..31], s[0..31] / u32

sceil.f32

s[0..31], s[0..31] / f32

sclz.u32

s[0..31], s[0..31] / u32

scvt.f32.s32

s[0..31], s[0..31] / f32

scvt.s32.f32

s[0..31], s[0..31] / i32

sdelay

u11

seq.f32

p[0..13], s[0..31], s[0..31] / f32

seq.s32

p[0..13], s[0..31], s[0..31] / i32

sfence

无操作数

sfloor.f32

s[0..31], s[0..31] / f32

sge.f32

p[0..13], s[0..31], s[0..31] / f32

sge.s32

p[0..13], s[0..31], s[0..31] / i32

sge.u32

p[0..13], s[0..31], s[0..31] / u32

sgt.f32

p[0..13], s[0..31], s[0..31] / f32

sgt.s32

p[0..13], s[0..31], s[0..31] / i32

sgt.u32

p[0..13], s[0..31], s[0..31] / u32

shalt

无操作数

shalt.yield.cond

无操作数

simm.s32

s[0..31], i32

sld

s[0..31], [smem:(s[0..31] / u32)]
s[0..31], [smem:(s[0..31] [+ (s[0..31] / u32)])]

sle.f32

p[0..13], s[0..31], s[0..31] / f32

sle.s32

p[0..13], s[0..31], s[0..31] / i32

sle.u32

p[0..13], s[0..31], s[0..31] / u32

slt.f32

p[0..13], s[0..31], s[0..31] / f32

slt.s32

p[0..13], s[0..31], s[0..31] / i32

slt.u32

p[0..13], s[0..31], s[0..31] / u32

smax.f32

s[0..31], s[0..31], s[0..31] / f32

smax.u32

s[0..31], s[0..31], s[0..31] / u32

smin.f32

s[0..31], s[0..31], s[0..31] / f32

smin.u32

s[0..31], s[0..31], s[0..31] / u32

smov

s[0..31], s[0..31]

sne.f32

p[0..13], s[0..31], s[0..31] / f32

sne.s32

p[0..13], s[0..31], s[0..31] / i32

sor.u32

s[0..31], s[0..31] / u32, s[0..31]

spop

s[0..31], v2sf
s[0..31], drf
s[0..31], sfrf

srdreg.gtchi

s[0..31]

srdreg.gtclo

s[0..31]

srdreg.lcchi

s[0..31]

srdreg.lcclo

s[0..31]

srdreg.tag

s[0..31]

srdreg.tcid

s[0..31]

srdreg.tm

s[0..31]

srdreg.yieldreq

s[0..31]

ssettag

s[0..31] / u32

sshla.ov.s32

s[0..31], s[0..31], s[0..31] / u32

sshll.u32

s[0..31], s[0..31], s[0..31] / u32

sshra.s32

s[0..31], s[0..31], s[0..31] / u32

sshrl.u32

s[0..31], s[0..31], s[0..31] / u32

sst

[smem:(s[0..31] / u32)], s[0..31]

ssub.f32

s[0..31], s[0..31] / f32, s[0..31]

ssub.ov.s32

s[0..31], s[0..31] / i32, s[0..31]

ssub.s32

s[0..31], s[0..31] / i32, s[0..31]

sweird.f32

p[0..13], s[0..31]

sxor.u32

s[0..31], s[0..31] / u32, s[0..31]

dma#

助记符

按顺序排列的操作数类型

dma.general

[端点:(s[0..31] / v[0..63])], [端点:(s[0..31] / v[0..63])], length=(s[0..31] / u32), dst_flag=([sflag:(s[0..31])]), src_flag=([sflag:(s[0..31])]), stride_descriptor=([smem:(s[0..31] / u32)]), stride_count=(u3), ici_dest=(s[0..31]), [opcode=(write / write_4b / compare_and_swap / read_and_add)], [sync=(32b_word / descriptor)], [thread=(u1)], [relaxed=(u1)], [host_upper=(s[0..31])], [src_operand=(vreg / int_one / int_negative_one / zero / float_one / float_negative_one / float_one_half / zero_imm0 / zero_imm1 / zero_imm2 / zero_imm3 / zero_imm4 / zero_imm5 / ones_imm0 / ones_imm1 / ones_imm2 / ones_imm3 / ones_imm4 / ones_imm5 / imm0_zero / imm1_zero / imm2_zero / imm3_zero / imm4_zero / imm5_zero / imm1_imm0 / imm3_imm2 / imm5_imm4 / vs0 / vs1 / vs2 / vs3)]

dma.general.trace

[端点:(s[0..31] / v[0..63])], [端点:(s[0..31] / v[0..63])], length=(s[0..31] / u32), dst_flag=([sflag:(s[0..31])]), src_flag=([sflag:(s[0..31])]), stride_descriptor=([smem:(s[0..31] / u32)]), stride_count=(u3), ici_dest=(s[0..31]), [opcode=(write / write_4b / compare_and_swap / read_and_add)], [sync=(32b_word / descriptor)], [thread=(u1)], [relaxed=(u1)], [host_upper=(s[0..31])], [src_operand=(vreg / int_one / int_negative_one / zero / float_one / float_negative_one / float_one_half / zero_imm0 / zero_imm1 / zero_imm2 / zero_imm3 / zero_imm4 / zero_imm5 / ones_imm0 / ones_imm1 / ones_imm2 / ones_imm3 / ones_imm4 / ones_imm5 / imm0_zero / imm1_zero / imm2_zero / imm3_zero / imm4_zero / imm5_zero / imm1_imm0 / imm3_imm2 / imm5_imm4 / vs0 / vs1 / vs2 / vs3)]

dma.simple

[端点:(s[0..31] / v[0..63])], [端点:(s[0..31] / v[0..63])], length=(s[0..31] / u32), dst_flag=([sflag:(s[0..31] / u32)]), [opcode=(write / write_4b / compare_and_swap / read_and_add)], [sync=(32b_word / descriptor)], [thread=(u1)], [relaxed=(u1)], [host_upper=(s[0..31])], [src_operand=(vreg / int_one / int_negative_one / zero / float_one / float_negative_one / float_one_half / zero_imm0 / zero_imm1 / zero_imm2 / zero_imm3 / zero_imm4 / zero_imm5 / ones_imm0 / ones_imm1 / ones_imm2 / ones_imm3 / ones_imm4 / ones_imm5 / imm0_zero / imm1_zero / imm2_zero / imm3_zero / imm4_zero / imm5_zero / imm1_imm0 / imm3_imm2 / imm5_imm4 / vs0 / vs1 / vs2 / vs3)]

dma.simple.trace

[端点:(s[0..31] / v[0..63])], [端点:(s[0..31] / v[0..63])], length=(s[0..31] / u32), dst_flag=([sflag:(s[0..31] / u32)]), [opcode=(write / write_4b / compare_and_swap / read_and_add)], [sync=(32b_word / descriptor)], [thread=(u1)], [relaxed=(u1)], [host_upper=(s[0..31])], [src_operand=(vreg / int_one / int_negative_one / zero / float_one / float_negative_one / float_one_half / zero_imm0 / zero_imm1 / zero_imm2 / zero_imm3 / zero_imm4 / zero_imm5 / ones_imm0 / ones_imm1 / ones_imm2 / ones_imm3 / ones_imm4 / ones_imm5 / imm0_zero / imm1_zero / imm2_zero / imm3_zero / imm4_zero / imm5_zero / imm1_imm0 / imm3_imm2 / imm5_imm4 / vs0 / vs1 / vs2 / vs3)]

dma.strided

[端点:(s[0..31])], [端点:(s[0..31])], length=(s[0..31] / u32), dst_flag=([sflag:(s[0..31] / u32)]), dst_stride=(s[0..31]), src_stride=(s[0..31]), elements_per_stride=(s[0..31]), inner_vector_length=(u5), [opcode=(write / write_4b / compare_and_swap / read_and_add)], [sync=(32b_word / descriptor)], [thread=(u1)], [relaxed=(u1)], [host_upper=(s[0..31])]

dma.strided.trace

[端点:(s[0..31])], [端点:(s[0..31])], length=(s[0..31] / u32), dst_flag=([sflag:(s[0..31] / u32)]), dst_stride=(s[0..31]), src_stride=(s[0..31]), elements_per_stride=(s[0..31]), inner_vector_length=(u5), [opcode=(write / write_4b / compare_and_swap / read_and_add)], [sync=(32b_word / descriptor)], [thread=(u1)], [relaxed=(u1)], [host_upper=(s[0..31])]

va0#

助记符

按顺序排列的操作数类型

vadd.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vadd.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vadd.8x128.s16

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vadd.8x128.s32

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vadd.high.8x128.f32.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vadd.low.8x128.f32.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vand.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vc.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vc.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vceil.bf16

v[0..63], v[0..63]

vceil.f32

v[0..63], v[0..63]

vclamp.gez.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclamp.gez.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclampa.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclampa.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclamps.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclamps.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclass.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclass.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclz

v[0..63], v[0..63]

vcmask

vm[0..63], v[0..63] / u32 / s[0..31]

vcombine.high.8x128

v[0..63], v[0..63], v[0..63]

vcombine.low.8x128

v[0..63], v[0..63], v[0..63]

vcvt.8x128.bf16.s4

v[0..63], v[0..63]

vcvt.8x128.bf16.s8

v[0..63], v[0..63]

vcvt.8x128.bf16.u4

v[0..63], v[0..63]

vcvt.8x128.bf16.u8

v[0..63], v[0..63]

vcvt.8x128.f32.bf16

v[0..63], v[0..63]

vcvt.8x128.f32.bf8

v[0..63], v[0..63]

vcvt.8x128.f32.hf16

v[0..63], v[0..63]

vcvt.8x128.f32.if8

v[0..63], v[0..63]

vcvt.8x128.f32.s32

v[0..63], v[0..63]

vcvt.8x128.s32.f32

v[0..63], v[0..63]

vcvt.8x128.s4.bf16

v[0..63], v[0..63]

vcvt.8x128.s8.bf16

v[0..63], v[0..63]

vcvt.8x128.u4.bf16

v[0..63], v[0..63]

vcvt.8x128.u8.bf16

v[0..63], v[0..63]

vcvt.sr.8x128.f32.bf16

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.bf8

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.hf16

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.if8

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

veq.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

veq.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

veq.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

veq.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vfloor.bf16

v[0..63], v[0..63]

vfloor.f32

v[0..63], v[0..63]

vge.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vge.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vge.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vge.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vge.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vge.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vgt.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vgt.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vgt.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vimm.8x128.s32

v[0..63], i32

vlaneseq.8x128.c.b16

v[0..63]

vlaneseq.8x128.i.b16

v[0..63]

vlaneseq.8x128.u32

v[0..63]

vle.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vle.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vle.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vle.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.to.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.to.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vlt.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vlt.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vlt.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vlt.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.to.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.to.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmac.bf16.f32

v[0..63] / u32 / s[0..31], v[0..63]

vmax.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmax.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmax.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmin.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmin.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmin.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmov.8x128

v[0..63], v[0..63] / s[0..31]

vmovacc.add.high

v[0..63]

vmovacc.add.low

v[0..63]

vmul.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vmul.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vmul.8x128.u16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmul.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vmul.8x128.u32.u64

v[0..63], v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vmul.bf16.f32

v[0..63] / u32 / s[0..31], v[0..63]

vne.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vne.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vne.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vne.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vnez.u8

vm[0..63], v[0..63] / u32 / s[0..31]

vnsel.8x128

v[0..63], vm[0..15], v[0..63] / u32 / s[0..31], v[0..63]

vor.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vpack.c.8x128.b16.b8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b2.b1

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b32.b16

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b4.b2

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b8.b4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.s4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.s8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.u4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.u8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.f32.bf16

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b16.b8

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b32.b16

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b8.b4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.bf16.s4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.bf16.u4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.f32.bf16

v[0..63], v[0..63], v[0..63]

vpcnt

v[0..63], v[0..63]

vperm.slane.8x128

v[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vremap.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vremap.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vrot.slane.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vround.rtna.bf16

v[0..63], v[0..63]

vround.rtna.f32

v[0..63], v[0..63]

vsel.8x128

v[0..63], vm[0..15], v[0..63] / u32 / s[0..31], v[0..63]

vsetacc.b32

v[0..63] / u32 / s[0..31], v[0..63]

vshll.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vshra.8x128.s32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vshrl.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vsmask

vm[0..63], v[0..63] / u32 / s[0..31]

vsub.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vsub.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vsub.8x128.s16

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vsub.8x128.s32

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vtrunc.bf16

v[0..63], v[0..63]

vtrunc.f32

v[0..63], v[0..63]

vunpack.c.0.8x128.bf8

v[0..63], v[0..63]

vunpack.c.0.8x128.if8

v[0..63], v[0..63]

vunpack.c.0.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.0.8x128.s8

v[0..63], v[0..63]

vunpack.c.0.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.1.8x128.bf8

v[0..63], v[0..63]

vunpack.c.1.8x128.if8

v[0..63], v[0..63]

vunpack.c.1.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.1.8x128.s8

v[0..63], v[0..63]

vunpack.c.1.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.2.8x128.bf8

v[0..63], v[0..63]

vunpack.c.2.8x128.if8

v[0..63], v[0..63]

vunpack.c.2.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.2.8x128.s8

v[0..63], v[0..63]

vunpack.c.2.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.3.8x128.bf8

v[0..63], v[0..63]

vunpack.c.3.8x128.if8

v[0..63], v[0..63]

vunpack.c.3.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.3.8x128.s8

v[0..63], v[0..63]

vunpack.c.3.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.hf16

v[0..63], v[0..63]

vunpack.c.l.8x128.s16

v[0..63], v[0..63]

vunpack.c.l.8x128.s8.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.u8.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.hf16

v[0..63], v[0..63]

vunpack.c.u.8x128.s16

v[0..63], v[0..63]

vunpack.c.u.8x128.s8.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.u8.bf16

v[0..63], v[0..63]

vunpack.i.0.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.0.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.1.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.1.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.2.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.2.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.3.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.3.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.l.8x128.bf16

v[0..63], v[0..63]

vunpack.i.l.8x128.s1

v[0..63], v[0..63]

vunpack.i.l.8x128.s16

v[0..63], v[0..63]

vunpack.i.l.8x128.s2

v[0..63], v[0..63]

vunpack.i.l.8x128.s4

v[0..63], v[0..63]

vunpack.i.u.8x128.bf16

v[0..63], v[0..63]

vunpack.i.u.8x128.s1

v[0..63], v[0..63]

vunpack.i.u.8x128.s16

v[0..63], v[0..63]

vunpack.i.u.8x128.s2

v[0..63], v[0..63]

vunpack.i.u.8x128.s4

v[0..63], v[0..63]

vunpack.vsel.c.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s8

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s8.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.u8.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.i.bf16

v[0..63], v[0..63], s[0..31]

vweird.8x128.bf16

vm[0..63], v[0..63]

vweird.8x128.f32

vm[0..63], v[0..63]

vxor.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

va1#

助记符

按顺序排列的操作数类型

vadd.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vadd.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vadd.8x128.s16

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vadd.8x128.s32

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vadd.high.8x128.f32.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vadd.low.8x128.f32.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vand.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vc.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vc.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vceil.bf16

v[0..63], v[0..63]

vceil.f32

v[0..63], v[0..63]

vclamp.gez.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclamp.gez.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclampa.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclampa.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclamps.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclamps.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclass.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclass.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclz

v[0..63], v[0..63]

vcmask

vm[0..63], v[0..63] / u32 / s[0..31]

vcombine.high.8x128

v[0..63], v[0..63], v[0..63]

vcombine.low.8x128

v[0..63], v[0..63], v[0..63]

vcvt.8x128.bf16.s4

v[0..63], v[0..63]

vcvt.8x128.bf16.s8

v[0..63], v[0..63]

vcvt.8x128.bf16.u4

v[0..63], v[0..63]

vcvt.8x128.bf16.u8

v[0..63], v[0..63]

vcvt.8x128.f32.bf16

v[0..63], v[0..63]

vcvt.8x128.f32.bf8

v[0..63], v[0..63]

vcvt.8x128.f32.hf16

v[0..63], v[0..63]

vcvt.8x128.f32.if8

v[0..63], v[0..63]

vcvt.8x128.f32.s32

v[0..63], v[0..63]

vcvt.8x128.s32.f32

v[0..63], v[0..63]

vcvt.8x128.s4.bf16

v[0..63], v[0..63]

vcvt.8x128.s8.bf16

v[0..63], v[0..63]

vcvt.8x128.u4.bf16

v[0..63], v[0..63]

vcvt.8x128.u8.bf16

v[0..63], v[0..63]

vcvt.sr.8x128.f32.bf16

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.bf8

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.hf16

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.if8

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

veq.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

veq.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

veq.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

veq.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vfloor.bf16

v[0..63], v[0..63]

vfloor.f32

v[0..63], v[0..63]

vge.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vge.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vge.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vge.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vge.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vge.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vgt.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vgt.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vgt.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vimm.8x128.s32

v[0..63], i32

vlaneseq.8x128.c.b16

v[0..63]

vlaneseq.8x128.i.b16

v[0..63]

vlaneseq.8x128.u32

v[0..63]

vle.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vle.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vle.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vle.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.to.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.to.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vlt.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vlt.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vlt.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vlt.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.to.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.to.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmac.bf16.f32

v[0..63] / u32 / s[0..31], v[0..63]

vmax.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmax.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmax.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmin.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmin.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmin.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmov.8x128

v[0..63], v[0..63] / s[0..31]

vmovacc.add.high

v[0..63]

vmovacc.add.low

v[0..63]

vmul.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vmul.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vmul.bf16.f32

v[0..63] / u32 / s[0..31], v[0..63]

vne.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vne.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vne.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vne.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vnez.u8

vm[0..63], v[0..63] / u32 / s[0..31]

vnsel.8x128

v[0..63], vm[0..15], v[0..63] / u32 / s[0..31], v[0..63]

vor.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vpack.c.8x128.b16.b8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b2.b1

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b32.b16

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b4.b2

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b8.b4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.s4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.s8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.u4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.u8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.f32.bf16

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b16.b8

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b32.b16

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b8.b4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.bf16.s4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.bf16.u4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.f32.bf16

v[0..63], v[0..63], v[0..63]

vpcnt

v[0..63], v[0..63]

vperm.slane.8x128

v[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vremap.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vremap.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vrot.slane.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vround.rtna.bf16

v[0..63], v[0..63]

vround.rtna.f32

v[0..63], v[0..63]

vsel.8x128

v[0..63], vm[0..15], v[0..63] / u32 / s[0..31], v[0..63]

vsetacc.b32

v[0..63] / u32 / s[0..31], v[0..63]

vshll.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vshra.8x128.s32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vshrl.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vsmask

vm[0..63], v[0..63] / u32 / s[0..31]

vsub.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vsub.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vsub.8x128.s16

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vsub.8x128.s32

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vtrunc.bf16

v[0..63], v[0..63]

vtrunc.f32

v[0..63], v[0..63]

vunpack.c.0.8x128.bf8

v[0..63], v[0..63]

vunpack.c.0.8x128.if8

v[0..63], v[0..63]

vunpack.c.0.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.0.8x128.s8

v[0..63], v[0..63]

vunpack.c.0.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.1.8x128.bf8

v[0..63], v[0..63]

vunpack.c.1.8x128.if8

v[0..63], v[0..63]

vunpack.c.1.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.1.8x128.s8

v[0..63], v[0..63]

vunpack.c.1.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.2.8x128.bf8

v[0..63], v[0..63]

vunpack.c.2.8x128.if8

v[0..63], v[0..63]

vunpack.c.2.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.2.8x128.s8

v[0..63], v[0..63]

vunpack.c.2.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.3.8x128.bf8

v[0..63], v[0..63]

vunpack.c.3.8x128.if8

v[0..63], v[0..63]

vunpack.c.3.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.3.8x128.s8

v[0..63], v[0..63]

vunpack.c.3.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.hf16

v[0..63], v[0..63]

vunpack.c.l.8x128.s16

v[0..63], v[0..63]

vunpack.c.l.8x128.s8.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.u8.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.hf16

v[0..63], v[0..63]

vunpack.c.u.8x128.s16

v[0..63], v[0..63]

vunpack.c.u.8x128.s8.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.u8.bf16

v[0..63], v[0..63]

vunpack.i.0.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.0.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.1.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.1.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.2.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.2.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.3.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.3.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.l.8x128.bf16

v[0..63], v[0..63]

vunpack.i.l.8x128.s1

v[0..63], v[0..63]

vunpack.i.l.8x128.s16

v[0..63], v[0..63]

vunpack.i.l.8x128.s2

v[0..63], v[0..63]

vunpack.i.l.8x128.s4

v[0..63], v[0..63]

vunpack.i.u.8x128.bf16

v[0..63], v[0..63]

vunpack.i.u.8x128.s1

v[0..63], v[0..63]

vunpack.i.u.8x128.s16

v[0..63], v[0..63]

vunpack.i.u.8x128.s2

v[0..63], v[0..63]

vunpack.i.u.8x128.s4

v[0..63], v[0..63]

vunpack.vsel.c.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s8

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s8.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.u8.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.i.bf16

v[0..63], v[0..63], s[0..31]

vweird.8x128.bf16

vm[0..63], v[0..63]

vweird.8x128.f32

vm[0..63], v[0..63]

vxor.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

va2#

助记符

按顺序排列的操作数类型

vadd.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vadd.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vadd.8x128.s16

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vadd.8x128.s32

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vadd.high.8x128.f32.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vadd.low.8x128.f32.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vand.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vc.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vc.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vceil.bf16

v[0..63], v[0..63]

vceil.f32

v[0..63], v[0..63]

vclamp.gez.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclamp.gez.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclampa.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclampa.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclamps.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclamps.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclass.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclass.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclz

v[0..63], v[0..63]

vcmask

vm[0..63], v[0..63] / u32 / s[0..31]

vcombine.high.8x128

v[0..63], v[0..63], v[0..63]

vcombine.low.8x128

v[0..63], v[0..63], v[0..63]

vcvt.8x128.bf16.s4

v[0..63], v[0..63]

vcvt.8x128.bf16.s8

v[0..63], v[0..63]

vcvt.8x128.bf16.u4

v[0..63], v[0..63]

vcvt.8x128.bf16.u8

v[0..63], v[0..63]

vcvt.8x128.f32.bf16

v[0..63], v[0..63]

vcvt.8x128.f32.bf8

v[0..63], v[0..63]

vcvt.8x128.f32.hf16

v[0..63], v[0..63]

vcvt.8x128.f32.if8

v[0..63], v[0..63]

vcvt.8x128.f32.s32

v[0..63], v[0..63]

vcvt.8x128.s32.f32

v[0..63], v[0..63]

vcvt.8x128.s4.bf16

v[0..63], v[0..63]

vcvt.8x128.s8.bf16

v[0..63], v[0..63]

vcvt.8x128.u4.bf16

v[0..63], v[0..63]

vcvt.8x128.u8.bf16

v[0..63], v[0..63]

vcvt.sr.8x128.f32.bf16

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.bf8

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.hf16

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.if8

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

veq.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

veq.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

veq.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

veq.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vfloor.bf16

v[0..63], v[0..63]

vfloor.f32

v[0..63], v[0..63]

vge.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vge.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vge.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vge.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vge.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vge.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vgt.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vgt.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vgt.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vimm.8x128.s32

v[0..63], i32

vlaneseq.8x128.c.b16

v[0..63]

vlaneseq.8x128.i.b16

v[0..63]

vlaneseq.8x128.u32

v[0..63]

vle.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vle.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vle.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vle.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.to.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.to.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vlt.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vlt.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vlt.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vlt.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.to.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.to.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmac.bf16.f32

v[0..63] / u32 / s[0..31], v[0..63]

vmax.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmax.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmax.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmin.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmin.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmin.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmov.8x128

v[0..63], v[0..63] / s[0..31]

vmovacc.add.high

v[0..63]

vmovacc.add.low

v[0..63]

vmul.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vmul.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vmul.8x128.u16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmul.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vmul.8x128.u32.u64

v[0..63], v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vmul.bf16.f32

v[0..63] / u32 / s[0..31], v[0..63]

vne.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vne.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vne.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vne.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vnez.u8

vm[0..63], v[0..63] / u32 / s[0..31]

vnsel.8x128

v[0..63], vm[0..15], v[0..63] / u32 / s[0..31], v[0..63]

vor.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vpack.c.8x128.b16.b8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b2.b1

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b32.b16

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b4.b2

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b8.b4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.s4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.s8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.u4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.u8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.f32.bf16

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b16.b8

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b32.b16

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b8.b4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.bf16.s4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.bf16.u4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.f32.bf16

v[0..63], v[0..63], v[0..63]

vpcnt

v[0..63], v[0..63]

vperm.slane.8x128

v[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vremap.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vremap.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vrot.slane.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vround.rtna.bf16

v[0..63], v[0..63]

vround.rtna.f32

v[0..63], v[0..63]

vsel.8x128

v[0..63], vm[0..15], v[0..63] / u32 / s[0..31], v[0..63]

vsetacc.b32

v[0..63] / u32 / s[0..31], v[0..63]

vshll.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vshra.8x128.s32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vshrl.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vsmask

vm[0..63], v[0..63] / u32 / s[0..31]

vsub.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vsub.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vsub.8x128.s16

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vsub.8x128.s32

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vtrunc.bf16

v[0..63], v[0..63]

vtrunc.f32

v[0..63], v[0..63]

vunpack.c.0.8x128.bf8

v[0..63], v[0..63]

vunpack.c.0.8x128.if8

v[0..63], v[0..63]

vunpack.c.0.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.0.8x128.s8

v[0..63], v[0..63]

vunpack.c.0.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.1.8x128.bf8

v[0..63], v[0..63]

vunpack.c.1.8x128.if8

v[0..63], v[0..63]

vunpack.c.1.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.1.8x128.s8

v[0..63], v[0..63]

vunpack.c.1.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.2.8x128.bf8

v[0..63], v[0..63]

vunpack.c.2.8x128.if8

v[0..63], v[0..63]

vunpack.c.2.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.2.8x128.s8

v[0..63], v[0..63]

vunpack.c.2.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.3.8x128.bf8

v[0..63], v[0..63]

vunpack.c.3.8x128.if8

v[0..63], v[0..63]

vunpack.c.3.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.3.8x128.s8

v[0..63], v[0..63]

vunpack.c.3.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.hf16

v[0..63], v[0..63]

vunpack.c.l.8x128.s16

v[0..63], v[0..63]

vunpack.c.l.8x128.s8.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.u8.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.hf16

v[0..63], v[0..63]

vunpack.c.u.8x128.s16

v[0..63], v[0..63]

vunpack.c.u.8x128.s8.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.u8.bf16

v[0..63], v[0..63]

vunpack.i.0.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.0.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.1.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.1.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.2.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.2.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.3.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.3.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.l.8x128.bf16

v[0..63], v[0..63]

vunpack.i.l.8x128.s1

v[0..63], v[0..63]

vunpack.i.l.8x128.s16

v[0..63], v[0..63]

vunpack.i.l.8x128.s2

v[0..63], v[0..63]

vunpack.i.l.8x128.s4

v[0..63], v[0..63]

vunpack.i.u.8x128.bf16

v[0..63], v[0..63]

vunpack.i.u.8x128.s1

v[0..63], v[0..63]

vunpack.i.u.8x128.s16

v[0..63], v[0..63]

vunpack.i.u.8x128.s2

v[0..63], v[0..63]

vunpack.i.u.8x128.s4

v[0..63], v[0..63]

vunpack.vsel.c.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s8

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s8.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.u8.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.i.bf16

v[0..63], v[0..63], s[0..31]

vweird.8x128.bf16

vm[0..63], v[0..63]

vweird.8x128.f32

vm[0..63], v[0..63]

vxor.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

va3#

助记符

按顺序排列的操作数类型

vadd.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vadd.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vadd.8x128.s16

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vadd.8x128.s32

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vadd.high.8x128.f32.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vadd.low.8x128.f32.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vand.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vc.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vc.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vceil.bf16

v[0..63], v[0..63]

vceil.f32

v[0..63], v[0..63]

vclamp.gez.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclamp.gez.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclampa.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclampa.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclamps.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclamps.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclass.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vclass.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vclz

v[0..63], v[0..63]

vcmask

vm[0..63], v[0..63] / u32 / s[0..31]

vcombine.high.8x128

v[0..63], v[0..63], v[0..63]

vcombine.low.8x128

v[0..63], v[0..63], v[0..63]

vcosq.8x128.bf16

erf, v[0..63]

vcosq.8x128.f32

erf, v[0..63]

vcvt.8x128.bf16.s4

v[0..63], v[0..63]

vcvt.8x128.bf16.s8

v[0..63], v[0..63]

vcvt.8x128.bf16.u4

v[0..63], v[0..63]

vcvt.8x128.bf16.u8

v[0..63], v[0..63]

vcvt.8x128.f32.bf16

v[0..63], v[0..63]

vcvt.8x128.f32.bf8

v[0..63], v[0..63]

vcvt.8x128.f32.hf16

v[0..63], v[0..63]

vcvt.8x128.f32.if8

v[0..63], v[0..63]

vcvt.8x128.f32.s32

v[0..63], v[0..63]

vcvt.8x128.s32.f32

v[0..63], v[0..63]

vcvt.8x128.s4.bf16

v[0..63], v[0..63]

vcvt.8x128.s8.bf16

v[0..63], v[0..63]

vcvt.8x128.u4.bf16

v[0..63], v[0..63]

vcvt.8x128.u8.bf16

v[0..63], v[0..63]

vcvt.sr.8x128.f32.bf16

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.bf8

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.hf16

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vcvt.sr.8x128.f32.if8

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

veq.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

veq.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

veq.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

veq.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

verf.8x128.bf16

erf, v[0..63]

verf.8x128.f32

erf, v[0..63]

vexp2.8x128.bf16

erf, v[0..63]

vexp2.8x128.f32

erf, v[0..63]

vfloor.bf16

v[0..63], v[0..63]

vfloor.f32

v[0..63], v[0..63]

vge.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vge.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vge.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vge.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vge.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vge.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vgt.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vgt.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vgt.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vgt.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vimm.8x128.s32

v[0..63], i32

vlaneseq.8x128.c.b16

v[0..63]

vlaneseq.8x128.i.b16

v[0..63]

vlaneseq.8x128.u32

v[0..63]

vle.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vle.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vle.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vle.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.to.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vle.to.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vlog2.8x128.bf16

erf, v[0..63]

vlog2.8x128.f32

erf, v[0..63]

vlt.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vlt.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vlt.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vlt.8x128.u16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.8x128.u32

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.to.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vlt.to.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmac.bf16.f32

v[0..63] / u32 / s[0..31], v[0..63]

vmax.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmax.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmax.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmin.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmin.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vmin.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vmov.8x128

v[0..63], v[0..63] / s[0..31]

vmovacc.add.high

v[0..63]

vmovacc.add.low

v[0..63]

vmul.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vmul.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vmul.bf16.f32

v[0..63] / u32 / s[0..31], v[0..63]

vne.8x128.bf16

vm[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vne.8x128.f32

vm[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vne.8x128.s16

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vne.8x128.s32

vm[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vnez.u8

vm[0..63], v[0..63] / u32 / s[0..31]

vnsel.8x128

v[0..63], vm[0..15], v[0..63] / u32 / s[0..31], v[0..63]

vor.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vpack.c.8x128.b16.b8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b2.b1

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b32.b16

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b4.b2

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.b8.b4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.s4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.s8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.u4

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.bf16.u8

v[0..63], v[0..63], v[0..63]

vpack.c.8x128.f32.bf16

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b16.b8

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b32.b16

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.b8.b4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.bf16.s4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.bf16.u4

v[0..63], v[0..63], v[0..63]

vpack.i.8x128.f32.bf16

v[0..63], v[0..63], v[0..63]

vpcnt

v[0..63], v[0..63]

vperm.slane.8x128

v[0..63], v[0..63], v[0..63] / i32 / s[0..31]

vpush.8x128

erf, v[0..63]

vrcp.8x128.bf16

erf, v[0..63]

vrcp.8x128.f32

erf, v[0..63]

vremap.8x128.bf16

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vremap.8x128.f32

v[0..63], v[0..63], v[0..63] / f32 / s[0..31]

vrot.slane.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vround.rtna.bf16

v[0..63], v[0..63]

vround.rtna.f32

v[0..63], v[0..63]

vrsqrt.8x128.bf16

erf, v[0..63]

vrsqrt.8x128.f32

erf, v[0..63]

vsel.8x128

v[0..63], vm[0..15], v[0..63] / u32 / s[0..31], v[0..63]

vsetacc.b32

v[0..63] / u32 / s[0..31], v[0..63]

vshll.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vshra.8x128.s32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vshrl.8x128.u32

v[0..63], v[0..63], v[0..63] / u32 / s[0..31]

vsigshft.8x128.bf16

erf, v[0..63]

vsigshft.8x128.f32

erf, v[0..63]

vsinq.8x128.bf16

erf, v[0..63]

vsinq.8x128.f32

erf, v[0..63]

vsmask

vm[0..63], v[0..63] / u32 / s[0..31]

vsub.8x128.bf16

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vsub.8x128.f32

v[0..63], v[0..63] / f32 / s[0..31], v[0..63]

vsub.8x128.s16

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vsub.8x128.s32

v[0..63], v[0..63] / i32 / s[0..31], v[0..63]

vtanh.8x128.bf16

erf, v[0..63]

vtanh.8x128.f32

erf, v[0..63]

vtrunc.bf16

v[0..63], v[0..63]

vtrunc.f32

v[0..63], v[0..63]

vunpack.c.0.8x128.bf8

v[0..63], v[0..63]

vunpack.c.0.8x128.if8

v[0..63], v[0..63]

vunpack.c.0.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.0.8x128.s8

v[0..63], v[0..63]

vunpack.c.0.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.1.8x128.bf8

v[0..63], v[0..63]

vunpack.c.1.8x128.if8

v[0..63], v[0..63]

vunpack.c.1.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.1.8x128.s8

v[0..63], v[0..63]

vunpack.c.1.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.2.8x128.bf8

v[0..63], v[0..63]

vunpack.c.2.8x128.if8

v[0..63], v[0..63]

vunpack.c.2.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.2.8x128.s8

v[0..63], v[0..63]

vunpack.c.2.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.3.8x128.bf8

v[0..63], v[0..63]

vunpack.c.3.8x128.if8

v[0..63], v[0..63]

vunpack.c.3.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.c.3.8x128.s8

v[0..63], v[0..63]

vunpack.c.3.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.hf16

v[0..63], v[0..63]

vunpack.c.l.8x128.s16

v[0..63], v[0..63]

vunpack.c.l.8x128.s8.bf16

v[0..63], v[0..63]

vunpack.c.l.8x128.u8.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.hf16

v[0..63], v[0..63]

vunpack.c.u.8x128.s16

v[0..63], v[0..63]

vunpack.c.u.8x128.s8.bf16

v[0..63], v[0..63]

vunpack.c.u.8x128.u8.bf16

v[0..63], v[0..63]

vunpack.i.0.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.0.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.1.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.1.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.2.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.2.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.3.8x128.s4.bf16

v[0..63], v[0..63]

vunpack.i.3.8x128.u4.bf16

v[0..63], v[0..63]

vunpack.i.l.8x128.bf16

v[0..63], v[0..63]

vunpack.i.l.8x128.s1

v[0..63], v[0..63]

vunpack.i.l.8x128.s16

v[0..63], v[0..63]

vunpack.i.l.8x128.s2

v[0..63], v[0..63]

vunpack.i.l.8x128.s4

v[0..63], v[0..63]

vunpack.i.u.8x128.bf16

v[0..63], v[0..63]

vunpack.i.u.8x128.s1

v[0..63], v[0..63]

vunpack.i.u.8x128.s16

v[0..63], v[0..63]

vunpack.i.u.8x128.s2

v[0..63], v[0..63]

vunpack.i.u.8x128.s4

v[0..63], v[0..63]

vunpack.vsel.c.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s8

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.s8.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.c.u8.bf16

v[0..63], v[0..63], s[0..31]

vunpack.vsel.i.bf16

v[0..63], v[0..63], s[0..31]

vweird.8x128.bf16

vm[0..63], v[0..63]

vweird.8x128.f32

vm[0..63], v[0..63]

vxor.8x128.u32

v[0..63], v[0..63] / u32 / s[0..31], v[0..63]

vst#

助记符

按顺序排列的操作数类型

vpush

v2sf, v[0..63]

vsetiar.lane

iar0, v[0..63]
iar1, v[0..63]

vsetiar.raw

iar0, v[0..63]
iar1, v[0..63]

vsetiar.sublane

iar0, v[0..63]
iar1, v[0..63]

vsetrngseed

v[0..63]

vst.8x128

[vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], v[0..63]
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], v[0..63]

vst.iar.8x128

[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], iar0, v[0..63]
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], iar1, v[0..63]

vst.iar.msk.8x128

[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], iar0, vm[0..15], v[0..63]
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], iar1, vm[0..15], v[0..63]

vst.msk.8x128

[vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], vm[0..15], v[0..63]
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], vm[0..15], v[0..63]

vst.sshfl.8x128

[vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)])], v[0..63], s[0..31] / u32
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)])], v[0..63], s[0..31] / u32

vst.sshfl.msk.8x128

[vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)])], vm[0..15], v[0..63], s[0..31] / u32
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)])], vm[0..15], v[0..63], s[0..31] / u32

vld0#

助记符

按顺序排列的操作数类型

vld.8x128

v[0..63], [vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]
v[0..63], [vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]

vld.iar0.8x128

v[0..63], [vmem:(s[0..31] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]

vld.iar1.8x128

v[0..63], [vmem:(s[0..31] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]

vld.sshfl.8x128

v[0..63], [vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)])], s[0..31] / u32
v[0..63], [vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)])], s[0..31] / u32

vrdreg.iar0

v[0..63]

vrdreg.iar1

v[0..63]

vld1#

助记符

按顺序排列的操作数类型

vld.8x128

v[0..63], [vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]
v[0..63], [vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]

vld.iar0.8x128

v[0..63], [vmem:(s[0..31] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]

vld.iar1.8x128

v[0..63], [vmem:(s[0..31] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]

vld.sshfl.8x128

v[0..63], [vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)])], s[0..31] / u32
v[0..63], [vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)])], s[0..31] / u32

vrdreg.iar0

v[0..63]

vrdreg.iar1

v[0..63]

misc#

助记符

按顺序排列的操作数类型

vdelay

u5(>= 1)
s[0..31] / u20

vint

s[0..31] / u20

vld.8x128

v[0..63], [vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]
v[0..63], [vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])]

vld.sshfl.8x128

v[0..63], [vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)])], s[0..31] / u32
v[0..63], [vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)])], s[0..31] / u32

vmand.8x128.u1

vm[0..15], vm[0..15], vm[0..15]

vmmov.8x128.u1

vm[0..15], vm[0..15]

vmneg.8x128.u1

vm[0..15], vm[0..15]

vmor.8x128.u1

vm[0..15], vm[0..15], vm[0..15]

vmpackc.even.8x128.u1

vm[0..15], vm[0..15], vm[0..15]

vmpackc.low.8x128.u1

vm[0..15], vm[0..15], vm[0..15]

vmxor.8x128.u1

vm[0..15], vm[0..15], vm[0..15]

vnop

无操作数

vrdreg.rngseed

v[0..63]

vrng.8x128.u32

v[0..63]

vsettm

s[0..31] / u20

vst.8x128

[vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], v[0..63]
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], v[0..63]

vst.msk.8x128

[vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], vm[0..15], v[0..63]
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)] [, ss=(s[0..31] / i20)])], vm[0..15], v[0..63]

vst.sshfl.8x128

[vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)])], v[0..63], s[0..31] / u32
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)])], v[0..63], s[0..31] / u32

vst.sshfl.msk.8x128

[vmem:(0 [+ (u20)] [, sm=(s[0..31] / u20)])], vm[0..15], v[0..63], s[0..31] / u32
[vmem:(s[0..31] [+ (u20)] [, sm=(s[0..31] / u20)])], vm[0..15], v[0..63], s[0..31] / u32

vsyncadd.done.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncadd.doneinv.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncadd.remote.done.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncadd.remote.doneinv.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncadd.remote.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncadd.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncdonemov

sfrf, [sflag:(s[0..31] / u20)]

vsyncmov

sfrf, [sflag:(s[0..31] / u20)]

vsyncpa.u1

[sflag:(s[0..31] / u20)], s[0..31] / u20

vsyncpamov

sfrf, [sflag:(s[0..31] / u20)]

vsyncset.done.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncset.doneinv.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncset.remote.done.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncset.remote.doneinv.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncset.remote.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vsyncset.s32

[sflag:(s[0..31] / u20)], s[0..31] / i20

vtrace

u32 / s[0..31]

vwait.done

[sflag:(s[0..31] / u20)]

vwait.done.yield

[sflag:(s[0..31] / u20)]

vwait.eq

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.eq.yield

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.ge

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.ge.yield

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.gt

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.gt.yield

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.lt

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.lt.yield

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.ne

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.ne.yield

[sflag:(s[0..31] / u20)], s[0..31] / i20

vwait.notdone

[sflag:(s[0..31] / u20)]

vwait.notdone.yield

[sflag:(s[0..31] / u20)]

vx0#

助记符

按顺序排列的操作数类型

vadd.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vadd.xlane.8x128.f32

trf0 / trf1, v[0..63]

vbcast.lane.8x128

trf0 / trf1, v[0..63], s[0..31] / u20

vbcast.lane.packed.8x128

trf0 / trf1, v[0..63], s[0..31] / u20

vbcast.lane.packed.b8.8x128

v[0..63], s[0..31] / u20

vlgmr

gmr0 / gmr1, msra0 / msra1
gmr0 / gmr1, msrb0 / msrb1

vllmr

lmr0 / lmr1, msra0 / msra1
lmr0 / lmr1, msrb0 / msrb1

vmatmul.8x128.bf16

mrf0 / mrf1, v[0..63]

vmatmul.8x128.bf16.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.bf16.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.bf16.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.bf8.bf16

mrf0 / mrf1, v[0..63]

vmatmul.8x128.bf8.bf16.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.bf8.bf16.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.bf8.bf16.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.f32

mrf0 / mrf1, v[0..63]

vmatmul.8x128.f32.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.f32.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.f32.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.if8.bf16

mrf0 / mrf1, v[0..63]

vmatmul.8x128.if8.bf16.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.if8.bf16.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.if8.bf16.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.s4

mrf0 / mrf1, v[0..63]

vmatmul.8x128.s4.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.s4.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.s4.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.s8

mrf0 / mrf1, v[0..63]

vmatmul.8x128.s8.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.s8.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.s8.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.u4

mrf0 / mrf1, v[0..63]

vmatmul.8x128.u4.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.u4.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.u4.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.u8

mrf0 / mrf1, v[0..63]

vmatmul.8x128.u8.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.u8.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.u8.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.lmr.104

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.104.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.112

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.112.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.120

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.120.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.128

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.128.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.16

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.16.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.24

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.24.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.32

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.32.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.40

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.40.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.48

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.48.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.56

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.56.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.64

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.64.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.72

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.72.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.8

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.8.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.80

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.80.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.88

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.88.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.96

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.96.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmulprep

mubr0 / mubr1, v[0..63]

vmatmulprep.b16.msk

mubr0 / mubr1, vm[0..15], v[0..63]

vmatmulprep.b32.msk

mubr0 / mubr1, vm[0..15], v[0..63]

vmatmulprep.b8.msk

mubr0 / mubr1, vm[0..15], v[0..63]

vmatpush1.8x128.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.bf8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.bf8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.bf8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.bf8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.f32

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.f32.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.f32.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.f32.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.if8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.if8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.if8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.if8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.s4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.s4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.s4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.s4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.s8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.s8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.s8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.s8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.u4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.u4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.u4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.u4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.u8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.u8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.u8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.u8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.bf8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.bf8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.bf8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.bf8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.f32

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.f32.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.f32.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.f32.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.if8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.if8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.if8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.if8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.s4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.s4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.s4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.s4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.s8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.s8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.s8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.s8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.u4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.u4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.u4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.u4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.u8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.u8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.u8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.u8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.bf8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.bf8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.bf8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.bf8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.f32

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.f32.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.f32.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.f32.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.if8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.if8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.if8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.if8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.s4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.s4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.s4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.s4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.s8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.s8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.s8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.s8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.u4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.u4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.u4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.u4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.u8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.u8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.u8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.u8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpushprep

subr0 / subr1, v[0..63]

vmatpushprep.b16.msk

subr0 / subr1, vm[0..15], v[0..63]

vmatpushprep.b32.msk

subr0 / subr1, vm[0..15], v[0..63]

vmatpushprep.b8.msk

subr0 / subr1, vm[0..15], v[0..63]

vmax.index.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vmax.index.xlane.8x128.f32

trf0 / trf1, v[0..63]

vmax.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vmax.xlane.8x128.f32

trf0 / trf1, v[0..63]

vmin.index.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vmin.index.xlane.8x128.f32

trf0 / trf1, v[0..63]

vmin.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vmin.xlane.8x128.f32

trf0 / trf1, v[0..63]

vperm.lane.8x128

trf0 / trf1, v[0..63]

vrot.lane.8x128

trf0 / trf1, v[0..63], s[0..31] / u20

vrot.lane.packed.8x128

trf0 / trf1, v[0..63], s[0..31] / u20

vrot.lane.packed.b8.8x128

v[0..63], s[0..31] / u20

vsetperm.all.bytes.u32

pcr0 / pcr1, v[0..63]

vsetperm.all.u8

pcr0 / pcr1, v[0..63]

vsetperm.half.u8

v[0..63]

vsetperm.u8

pcr0 / pcr1, v[0..63]

vxpose.c.b8.start

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.c.b8.start.end

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.cont

trf0 / trf1, v[0..63]

vxpose.end

trf0 / trf1, v[0..63]

vxpose.packed.start

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.packed.start.end

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.start

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.start.end

trf0 / trf1, v[0..63], s[0..31] / u20

vx1#

助记符

按顺序排列的操作数类型

vadd.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vadd.xlane.8x128.f32

trf0 / trf1, v[0..63]

vbcast.lane.8x128

trf0 / trf1, v[0..63], s[0..31] / u20

vbcast.lane.packed.8x128

trf0 / trf1, v[0..63], s[0..31] / u20

vbcast.lane.packed.b8.8x128

v[0..63], s[0..31] / u20

vlgmr

gmr0 / gmr1, msra0 / msra1
gmr0 / gmr1, msrb0 / msrb1

vllmr

lmr0 / lmr1, msra0 / msra1
lmr0 / lmr1, msrb0 / msrb1

vmatmul.8x128.bf16

mrf0 / mrf1, v[0..63]

vmatmul.8x128.bf16.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.bf16.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.bf16.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.bf8.bf16

mrf0 / mrf1, v[0..63]

vmatmul.8x128.bf8.bf16.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.bf8.bf16.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.bf8.bf16.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.f32

mrf0 / mrf1, v[0..63]

vmatmul.8x128.f32.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.f32.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.f32.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.if8.bf16

mrf0 / mrf1, v[0..63]

vmatmul.8x128.if8.bf16.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.if8.bf16.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.if8.bf16.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.s4

mrf0 / mrf1, v[0..63]

vmatmul.8x128.s4.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.s4.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.s4.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.s8

mrf0 / mrf1, v[0..63]

vmatmul.8x128.s8.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.s8.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.s8.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.u4

mrf0 / mrf1, v[0..63]

vmatmul.8x128.u4.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.u4.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.u4.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.8x128.u8

mrf0 / mrf1, v[0..63]

vmatmul.8x128.u8.lgmr

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), v[0..63]

vmatmul.8x128.u8.lgmr.msk

(mrf0, gmr0, msra0) / (mrf1, gmr1, msra1), vm[0..15], v[0..63]
(mrf0, gmr0, msrb0) / (mrf1, gmr1, msrb1), vm[0..15], v[0..63]

vmatmul.8x128.u8.msk

mrf0 / mrf1, vm[0..15], v[0..63]

vmatmul.lmr.104

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.104.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.112

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.112.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.120

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.120.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.128

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.128.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.16

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.16.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.24

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.24.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.32

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.32.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.40

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.40.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.48

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.48.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.56

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.56.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.64

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.64.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.72

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.72.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.8

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.8.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.80

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.80.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.88

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.88.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmul.lmr.96

(mrf0, lmr0) / (mrf1, lmr1)

vmatmul.lmr.96.lgmr

(mrf0, lmr0, gmr0, msra0) / (mrf1, lmr1, gmr1, msra1)
(mrf0, lmr0, gmr0, msrb0) / (mrf1, lmr1, gmr1, msrb1)

vmatmulprep

mubr0 / mubr1, v[0..63]

vmatmulprep.b16.msk

mubr0 / mubr1, vm[0..15], v[0..63]

vmatmulprep.b32.msk

mubr0 / mubr1, vm[0..15], v[0..63]

vmatmulprep.b8.msk

mubr0 / mubr1, vm[0..15], v[0..63]

vmatpush1.8x128.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.bf8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.bf8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.bf8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.bf8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.f32

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.f32.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.f32.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.f32.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.if8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.if8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.if8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.if8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.s4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.s4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.s4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.s4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.s8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.s8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.s8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.s8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.u4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.u4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.u4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.u4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.u8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.u8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush1.8x128.u8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush1.8x128.u8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.bf8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.bf8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.bf8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.bf8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.f32

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.f32.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.f32.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.f32.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.if8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.if8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.if8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.if8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.s4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.s4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.s4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.s4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.s8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.s8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.s8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.s8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.u4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.u4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.u4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.u4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.u8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.u8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush2.8x128.u8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush2.8x128.u8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.bf8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.bf8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.bf8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.bf8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.f32

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.f32.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.f32.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.f32.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.if8.bf16

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.if8.bf16.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.if8.bf16.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.if8.bf16.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.s4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.s4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.s4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.s4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.s8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.s8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.s8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.s8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.u4

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.u4.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.u4.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.u4.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.u8

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.u8.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpush3.8x128.u8.xpose

msra0 / msrb0 / msra1 / msrb1, v[0..63]

vmatpush3.8x128.u8.xpose.msk

msra0 / msrb0 / msra1 / msrb1, vm[0..15], v[0..63]

vmatpushprep

subr0 / subr1, v[0..63]

vmatpushprep.b16.msk

subr0 / subr1, vm[0..15], v[0..63]

vmatpushprep.b32.msk

subr0 / subr1, vm[0..15], v[0..63]

vmatpushprep.b8.msk

subr0 / subr1, vm[0..15], v[0..63]

vmax.index.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vmax.index.xlane.8x128.f32

trf0 / trf1, v[0..63]

vmax.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vmax.xlane.8x128.f32

trf0 / trf1, v[0..63]

vmin.index.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vmin.index.xlane.8x128.f32

trf0 / trf1, v[0..63]

vmin.xlane.8x128.bf16

trf0 / trf1, v[0..63]

vmin.xlane.8x128.f32

trf0 / trf1, v[0..63]

vperm.lane.8x128

trf0 / trf1, v[0..63]

vrot.lane.8x128

trf0 / trf1, v[0..63], s[0..31] / u20

vrot.lane.packed.8x128

trf0 / trf1, v[0..63], s[0..31] / u20

vrot.lane.packed.b8.8x128

v[0..63], s[0..31] / u20

vsetperm.all.bytes.u32

pcr0 / pcr1, v[0..63]

vsetperm.all.u8

pcr0 / pcr1, v[0..63]

vsetperm.half.u8

v[0..63]

vsetperm.u8

pcr0 / pcr1, v[0..63]

vxpose.c.b8.start

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.c.b8.start.end

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.cont

trf0 / trf1, v[0..63]

vxpose.end

trf0 / trf1, v[0..63]

vxpose.packed.start

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.packed.start.end

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.start

trf0 / trf1, v[0..63], s[0..31] / u20

vxpose.start.end

trf0 / trf1, v[0..63], s[0..31] / u20

vr0#

助记符

按顺序排列的操作数类型

vpop.8x128

v[0..63], erf
v[0..63], mrf0 / mrf1
v[0..63], trf0 / trf1

vpop.add.8x128.s32

v[0..63], (mrf0, mrf1)

vr1#

助记符

按顺序排列的操作数类型

vpop.8x128

v[0..63], erf
v[0..63], mrf0 / mrf1
v[0..63], trf0 / trf1

vpop.add.8x128.s32

v[0..63], (mrf0, mrf1)